KR960039844A - Synchronous signal transmission control device of image display device - Google Patents

Synchronous signal transmission control device of image display device Download PDF

Info

Publication number
KR960039844A
KR960039844A KR1019950010273A KR19950010273A KR960039844A KR 960039844 A KR960039844 A KR 960039844A KR 1019950010273 A KR1019950010273 A KR 1019950010273A KR 19950010273 A KR19950010273 A KR 19950010273A KR 960039844 A KR960039844 A KR 960039844A
Authority
KR
South Korea
Prior art keywords
signal
pseudo
unit
synchronous
synchronization
Prior art date
Application number
KR1019950010273A
Other languages
Korean (ko)
Inventor
박노상
강재봉
Original Assignee
배순훈
대우전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 배순훈, 대우전자 주식회사 filed Critical 배순훈
Priority to KR1019950010273A priority Critical patent/KR960039844A/en
Publication of KR960039844A publication Critical patent/KR960039844A/en

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

본 발명은 동기신호분리수단과 의사동기신호생성수단 사이에 멀티플렉서를 설치하여 화상신호의 입력여부에 상관없이 전원이 ON되어 있으면 그 멀티플렉서를 통해 동기신호분리수단 또는 의사동기신호생성수단으로 부터의 동기신호/의사동기신호를 항상 후단의 신호처리단으로 전송되도록 한 화상표시장치의 동기신호 전송제어장치를 제공하기 위한 것이다.The present invention provides a multiplexer between the synchronizing signal separating means and the pseudo synchronizing signal generating means and synchronizes from the synchronizing signal separating means or the pseudo synchronizing signal generating means through the multiplexer when the power is turned on regardless of whether the image signal is input. SUMMARY OF THE INVENTION An object of the present invention is to provide a synchronization signal transmission control apparatus of an image display device in which a signal / pseudosynchronous signal is always transmitted to a signal processing stage at a later stage.

이를 위해 본 발명은, 입력화상신호에서 동기신호를 각각 분리하는 동기신호분리부(10)와, 소정의 의사동기신호를 생성하는 의사동기신호생성수단(15), 상기 동기신호분리부(10)로부터의 수평동기신호를 수취하여 내부적인 기준클럭과 위상로크시키는 위상동기루프부(20), 상기 동기신호분리부(10) 또는 상기 의사동기신호생성수단(15)으로부터의 수평동기신호를 기준으로 수직동기신호를 분주하여 화소구동소자의 구동을 위한 기수필드 및 우수필드를 판별하는 필드판별부(25) 및 제어부(45)로부터의 시스템클럭신호를 기호로 상기 동기신호분리부(10) 또는 상기 의사동기신호생성수단(15)으로부터의 복합동기신호를 지연시키는 지연수단(30)을 갖춘 화상표시장치에서, 상기 동기신호분리부(10)와 상기 의사동기신호생성수단(15) 사이에 설치되어 상기 제어부(45)의 제어하에 상기 동기신호분리부(10) 또는 상기 의사동기신호생성수단(15)으로부터의 동기신호를 각각 대응되는 상기 위상동기루프부(20)와 상기 필드판별부(25) 및 상기 지연수단(30)으로 전송시키는 멀티플렉서(50)를 추가로 구비하고, 상기 제어부(45)는 상기 동기신호분리부(10)로 화상신호가 입력되는 경우에는 상기 동기신호분리부(10)에서 분리된 동기신호가 상기 위상동기루프부(20)와 상기 필드판별부(25) 및 상기 지연수단(30)으로 전송되도록 상기 멀티플렉서(50)를 제어하는 반면, 상기 동기신호분리부(10)로 화상신호가 입력되지 않는 경우에는 상기 의사동기신호생성수단(15)에서의 의사동기신호가 상기 위상동기루프부(20)와 상기 필드판별부(25) 및 상기 지연수단(30)으로 전송되도록 상기 멀티플렉서(50)를 제어하는 것이다.To this end, the present invention, the synchronization signal separation unit 10 for separating the synchronization signal from the input image signal, pseudo-synchronization signal generation means 15 for generating a predetermined pseudo synchronization signal, the synchronization signal separation unit 10 A horizontal synchronous signal from the phase synchronous loop unit 20, the synchronous signal separation unit 10, or the pseudo synchronous signal generating means 15 which receives the horizontal synchronous signal from the phase lock and phase locks the internal reference clock. The sync signal separating unit 10 or the system clock signal from the field discriminating unit 25 and the control unit 45 for discriminating the odd field and the even field for driving the pixel driver by dividing the vertical sync signal. In the image display apparatus having the delay means 30 for delaying the composite synchronous signal from the pseudo synchronous signal generation means 15, it is provided between the synchronous signal separation section 10 and the pseudo synchronous signal generation means 15. The control Under the control of 45, the phase synchronizing loop unit 20, the field discriminating unit 25, and the synchronizing signal from the synchronizing signal separating unit 10 or the pseudo synchronizing signal generating unit 15 respectively correspond. A multiplexer 50 is further provided for transmitting to the delay means 30, and the control unit 45 separates from the sync signal separator 10 when an image signal is input to the sync signal separator 10. FIG. The multiplexer 50 is controlled so that the synchronized signal is transmitted to the phase synchronization loop unit 20, the field discrimination unit 25, and the delay means 30, while the image is transmitted to the synchronization signal separator 10. When no signal is input, the multiplexer is configured to transmit the pseudo-synchronous signal from the pseudo-synchronous signal generating means 15 to the phase-locked loop part 20, the field discriminating part 25, and the delay means 30. 50 is to control.

Description

화상표시장치의 동기신호 전송제어장치Synchronous signal transmission control device of image display device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 일실시예에 따른 화상표시장치의 동기신호 전송제어장치를 설명하는 블럭구성도.1 is a block diagram illustrating a synchronization signal transmission control apparatus of an image display apparatus according to an embodiment of the present invention.

Claims (1)

입력화상신호에서 동기신호를 각각 분리하는 동기신호분리부(10)와, 소정의 의사동기신호를 생성하는 의사동기신호생성수단(15), 상기 동기신호분리부(10)로부터의 수평동기신호를 수취하여 내부적인 기준클럭과 위상로크시키는 위상동기루프부(20), 상기 동기신호분리부(10) 또는 상기 의사동기신호생성수단(15)으로부터의 수평동기신호를 기준으로 수직동기신호를 분주하여 화소구동소자의 구동을 위한 기수필드 및 우수필드를 판별하는 필드판별부(25) 및, 제어부(45)로부터의 시스템클럭신호를 기초로 상기 동기신호분리부(10) 또는 상기 의사동기신호생성수단(15)으로부터의 복합동기신호를 지연시키는 지연수단(30)을 갖춘 화상표시장치에 있어서, 상기 동기신호분리부(10)와 상기 의사동기신호생성수단(15) 사이에 설치되어 상기 제어부(45)의 제어하에 상기 동기신호분리부(10) 또는 상기 의사동기신호생성수단(15)으로부터의 동기신호를 각각 대응하는 상기 위상동기루프부(20)와 상기 필드판별부(25) 및 상기 지연수단(30)으로 전송시키는 멀티플렉서(50)를 추가로 구비하고, 상기 제어부(45)는 상기 동기신호분리부(10)로 화상신호가 입력되는 경우에는 상기 동기신호분리부(10)에서 분리된 동기신호가 상기 위상동기루프부(20)와 상기 필드판별부(25) 및 상기 지연수단(30)으로 전송 되도록 상기 멀티 플렉서(50)를 제어하는 반면, 상기 동기신호분리부(10)로 화상신호가 입력되지 않는 경우에는 상기 의사동기신호생성수단(15)에서의 의사동기신호가 상기 위상동기루르프부(20)와 상기 필드판별부(25) 및 상기 지연수단(30)으로 전송되도록 상기 멀티플렉서(50)를 제어하는 것을 특징으로 하는 화상표시장치의 동기신호 전송제어장치.A sync signal separator 10 for separating the sync signal from the input image signal, a pseudo sync signal generation means 15 for generating a predetermined pseudo sync signal, and a horizontal sync signal from the sync signal separator 10 A vertical synchronization signal is divided on the basis of the horizontal synchronization signal from the phase synchronization loop unit 20, the synchronization signal separation unit 10, or the pseudo synchronization signal generation means 15 which receive and phase lock the internal reference clock. The field discrimination unit 25 for discriminating the odd field and the even field for driving the pixel driver, and the synchronizing signal separation unit 10 or the pseudo synchronizing signal generating means based on the system clock signal from the control unit 45; An image display apparatus having a delay means (30) for delaying a composite synchronization signal from (15), wherein the control unit (45) is provided between the synchronization signal separation unit (10) and the pseudo synchronization signal generation unit (15). Under the control of) The synchronous signal from the synchronous signal separation section 10 or the pseudo synchronous signal generation means 15 is respectively supplied to the phase synchronous loop section 20, the field discrimination section 25, and the delay means 30, respectively. The apparatus 45 further includes a multiplexer 50 that transmits the signal, and when the image signal is input to the sync signal separator 10, the sync signal separated by the sync signal separator 10 is in phase. While controlling the multiplexer 50 to be transmitted to the synchronous loop unit 20, the field discrimination unit 25, and the delay means 30, the image signal is not input to the synchronous signal separation unit 10. If not, the multiplexer 50 is transmitted such that the pseudo-synchronous signal from the pseudo-synchronous signal generating means 15 is transmitted to the phase-locked loop part 20, the field discriminating part 25, and the delay means 30. Synchronization of the image display apparatus characterized by controlling Call transfer control device. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950010273A 1995-04-28 1995-04-28 Synchronous signal transmission control device of image display device KR960039844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950010273A KR960039844A (en) 1995-04-28 1995-04-28 Synchronous signal transmission control device of image display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950010273A KR960039844A (en) 1995-04-28 1995-04-28 Synchronous signal transmission control device of image display device

Publications (1)

Publication Number Publication Date
KR960039844A true KR960039844A (en) 1996-11-25

Family

ID=66523360

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950010273A KR960039844A (en) 1995-04-28 1995-04-28 Synchronous signal transmission control device of image display device

Country Status (1)

Country Link
KR (1) KR960039844A (en)

Similar Documents

Publication Publication Date Title
KR960042315A (en) Apparatus and method for transmitting audio data using video signal line
KR960020365A (en) Line-lock device of the video camera
KR860008672A (en) 2-loop line deflection system
KR100824016B1 (en) Systme and method for executiing synchronization of output data created in asynchronous dual camera
KR960039844A (en) Synchronous signal transmission control device of image display device
KR960009536B1 (en) Apparatus for arranging frame phase
KR920001941A (en) Imaging Apparatus and Image Signal Processing System for Synthesizing Image Signal
KR950024603A (en) Device for converting general video signal (2D) into stereoscopic video signal (3D)
KR970024558A (en) Clock generator
KR100304891B1 (en) Flat Panel Display System
KR970056907A (en) Plasma Display Panel TV Clock Generator
JPS6218871A (en) Phase synchronizing device
KR0169370B1 (en) Signal process circuit of liquid crystal system for data enable signal priority process
KR970004640A (en) Sync signal processing circuit of LCD projector
JPH04265079A (en) Picture processor
KR100287783B1 (en) Cctv camera
KR0169855B1 (en) Apparatus for controlling reset signals in trigger board
KR0173348B1 (en) Apparatus for image processing with multi-picture display function
KR960043826A (en) Image signal selection device in PDDP
JPH0650908B2 (en) Image division multiplexing method
KR970019561A (en) Horizontal Synchronization Signal Synchronizer
JPS59223078A (en) Control device of displaying timing
JPH04175069A (en) Synchronizing phase matching device
JPH08149333A (en) Controller for television camera
JPH0440127A (en) Data transmitter

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application