KR960036324A - Redundancy Device of Digital Output - Google Patents

Redundancy Device of Digital Output Download PDF

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Publication number
KR960036324A
KR960036324A KR1019950005261A KR19950005261A KR960036324A KR 960036324 A KR960036324 A KR 960036324A KR 1019950005261 A KR1019950005261 A KR 1019950005261A KR 19950005261 A KR19950005261 A KR 19950005261A KR 960036324 A KR960036324 A KR 960036324A
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KR
South Korea
Prior art keywords
unit
output
output buffer
data
result
Prior art date
Application number
KR1019950005261A
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Korean (ko)
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KR0147624B1 (en
Inventor
오상윤
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950005261A priority Critical patent/KR0147624B1/en
Publication of KR960036324A publication Critical patent/KR960036324A/en
Application granted granted Critical
Publication of KR0147624B1 publication Critical patent/KR0147624B1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

본 발명은 디지탈 출력을 이중화시키는 장치에 관한 것으로서, 디지탈 시스템에서 출력된 데이터를 버퍼링하기 위한 출력 버퍼부; 상기 출력 버퍼부의 입출력 테이터의 동일 여부를 판단하기 위한 비교부; 상기 비교부의 결과에 따라 테이터를 선택적으로 출력하는 멀티플렉서부; 그리고 상기 비교부의 결과에 따라 결함이 있는 출력 버퍼를 검출할 수 있는 검출 표시부;를 포함하는 것을 특징으로 하여, 디지탈 시스템의 출력 버퍼에 결함이 생긴 경우에 또다른 출력버퍼로 대처해서 테이터를 출력할 수 있을 뿐만 아니라, 상기 결함이 발생된 출력 버퍼를 검출할 수 있게 됨에 따라 시스템의 신뢰도를 증가시킬 수 있다.The present invention relates to an apparatus for redundancy of a digital output, comprising: an output buffer unit for buffering data output from a digital system; A comparison unit to determine whether input / output data of the output buffer unit are the same; A multiplexer unit for selectively outputting data according to the result of the comparison unit; And a detection display unit capable of detecting a defective output buffer according to the result of the comparing unit. In the case where a defect occurs in the output buffer of the digital system, the output unit may output data in response to another output buffer. In addition, the reliability of the system can be increased by being able to detect the output buffer in which the fault has occurred.

Description

디지탈 출력의 이중화 장치Redundancy Device of Digital Output

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 따른 디지탈 출력의 이중화 장치를 도해한 블록도이다. 제3도는 본 발명에 따른 다지탈 출력의 이중화 장치를 나타낸 회로도이다.2 is a block diagram illustrating a digital output redundancy apparatus according to the present invention. 3 is a circuit diagram showing a digital output duplication apparatus according to the present invention.

Claims (2)

디지탈 시스템에서 출력된 테이터를 버퍼링하기 위한 출력 버퍼부; 상기 출력 버퍼부의 입출력 데이터의 동일 여부를 판단하기 위한 비교부; 상기 비교부의 결과에 따라 데이터를 선택적으로 출력하는 멀티플렉서부; 그리고 상기 비교부의 결과에 따라 결함이 있는 출력 버퍼를 검출할 수 있는 검출 표시부;를 포함하는 것을 특징으로 하는 디지탈 출력의 이중화 장치.An output buffer unit for buffering data output from the digital system; A comparison unit for determining whether input / output data of the output buffer unit is the same; A multiplexer unit for selectively outputting data according to a result of the comparison unit; And a detection display unit capable of detecting a defective output buffer in accordance with the result of the comparison unit. 제1항에 있어서 상기 출력 버퍼부에 입력된 데이터가, 내부의 출력 버퍼들로써 병렬로 분기되어 비교부와 멀티플렉서부에 각각 입력되는 것을 특징으로 하는 디지탈 출력의 이중화 장치.2. The apparatus of claim 1, wherein data input to the output buffer unit is branched in parallel with internal output buffers and input to the comparator and multiplexer units, respectively. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950005261A 1995-03-14 1995-03-14 Digital output double apparatus KR0147624B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950005261A KR0147624B1 (en) 1995-03-14 1995-03-14 Digital output double apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950005261A KR0147624B1 (en) 1995-03-14 1995-03-14 Digital output double apparatus

Publications (2)

Publication Number Publication Date
KR960036324A true KR960036324A (en) 1996-10-28
KR0147624B1 KR0147624B1 (en) 1998-12-01

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ID=19409777

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950005261A KR0147624B1 (en) 1995-03-14 1995-03-14 Digital output double apparatus

Country Status (1)

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KR (1) KR0147624B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100684896B1 (en) * 2005-04-20 2007-02-20 삼성전자주식회사 Output Buffer Circuit of Semiconductor Memory Device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100684896B1 (en) * 2005-04-20 2007-02-20 삼성전자주식회사 Output Buffer Circuit of Semiconductor Memory Device

Also Published As

Publication number Publication date
KR0147624B1 (en) 1998-12-01

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