KR960035219A - Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip - Google Patents

Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip Download PDF

Info

Publication number
KR960035219A
KR960035219A KR1019950004389A KR19950004389A KR960035219A KR 960035219 A KR960035219 A KR 960035219A KR 1019950004389 A KR1019950004389 A KR 1019950004389A KR 19950004389 A KR19950004389 A KR 19950004389A KR 960035219 A KR960035219 A KR 960035219A
Authority
KR
South Korea
Prior art keywords
input port
dsp
chip
program
expansion circuit
Prior art date
Application number
KR1019950004389A
Other languages
Korean (ko)
Inventor
김학도
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950004389A priority Critical patent/KR960035219A/en
Publication of KR960035219A publication Critical patent/KR960035219A/en

Links

Landscapes

  • Microcomputers (AREA)

Abstract

1. 청구범위 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION

외부로부터 데이타를 입력받는 DSP코아의 입력포트를 확장하는 기술이다.It is a technology to expand the input port of DSP core that receives data from outside.

2. 발명이 해결하고자 하는 기술적 과제2. Technical problem to be solved by the invention

데이타 버스의 포트가 수시로 변하기 때문에 래치신호의 특정구간에 있어서만 데이타를 입력시켜야 하므로, 3상태버퍼를 사용할 수 밖에 없어 회로가 불안정하게 동작할 여지가 많아지고, 또한 DSP코아내의 프로그램 입장에 있어서도 외부로부터 읽어들인 후 상태를 판단하여야 하기 때문에 DSP칩의 처리속도가 떨어지는 문제를 해결한다.Since the port of the data bus changes from time to time, the data must be input only in a specific section of the latch signal. Therefore, there is no choice but to use a three-state buffer, which makes the circuit unstable. It solves the problem that the processing speed of DSP chip is slowed down because it needs to judge the state after reading from.

3. 발명의 해결방법의 요지3. Summary of Solution to Invention

프로그램 어드레스를 이용하여 프로그램의 해당위치에서 외부로부터 상티데이타를 입력받을 수 있도록 하여 DSP의 입력포트를 확장한다.Use the program address to expand the input port of the DSP so that constant data can be received from the external location of the program.

4. 발명의 중요한 용도4. Important uses of the invention

DSP칩의 입력포트 확장하는 회로에 적용한다.Applied to circuits that extend the input port of DSP chips.

Description

디지탈 신호 처리(DSP)칩에서 입력포트 확장회로Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 DSP칩의 입력포트 확장회로도.2 is an input port expansion circuit diagram of a DSP chip according to the present invention.

Claims (1)

DSP칩의 입력포트 확장회로에 있어서, 프로그램 어드레스를 발생하며, 외부로부터 각종 상태신호를 입력포트를 통해 입력받아 상기 상태신호를 체크하는 DSP코아(100)와, 상기 DSP코아(100)를 기동하기 위한 프로그램을 저장하는 메모리(200)와, 외부로부터 입력되는 각종 상태신호를 상기 DSP코아(100)로부터 출력되는 프로그램어드레스신호에 의해 역다중화하여 하나를 선택한 후 상기 DSP코아(100)의 입력포트(DIP1)로 출력하는 DEMUX(300)로 구성함을 특징으로 하는 회로.An input port expansion circuit of a DSP chip, which generates a program address, receives various state signals from an external source through an input port, and starts the DSP core 100 and checks the state signals, and starts the DSP core 100. Memory 200 for storing a program for the program, and various state signals input from the outside are demultiplexed by the program address signal output from the DSP core 100 to select one, and then an input port of the DSP core 100 Circuit characterized in that configured as DEMUX (300) to output to DIP1). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950004389A 1995-03-03 1995-03-03 Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip KR960035219A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950004389A KR960035219A (en) 1995-03-03 1995-03-03 Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950004389A KR960035219A (en) 1995-03-03 1995-03-03 Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip

Publications (1)

Publication Number Publication Date
KR960035219A true KR960035219A (en) 1996-10-24

Family

ID=66549584

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950004389A KR960035219A (en) 1995-03-03 1995-03-03 Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip

Country Status (1)

Country Link
KR (1) KR960035219A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100369480B1 (en) * 2001-02-19 2003-01-30 (주)씨앤에스 테크놀로지 Multiple project embedded architecture for dsp core based

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100369480B1 (en) * 2001-02-19 2003-01-30 (주)씨앤에스 테크놀로지 Multiple project embedded architecture for dsp core based

Similar Documents

Publication Publication Date Title
KR960004567B1 (en) Output buffer of semiconductor memory device
KR940022561A (en) Output circuit of semiconductor memory
KR950034777A (en) Semiconductor memory
KR960042730A (en) Semiconductor storage device
KR970012754A (en) Semiconductor memory and its writing method
KR850008567A (en) Semiconductor integrated circuit
KR930005033A (en) Nonvolatile Memory Circuit
KR900005457A (en) Semiconductor memory
KR910006994A (en) Sense amplifier circuit
KR890017702A (en) Semiconductor memory
KR960035219A (en) Input Port Expansion Circuit in Digital Signal Processing (DSP) Chip
KR20030039179A (en) Synchronous semiconductor memory apparatus capable of accomplishing mode change between single-ended strobe mode and differential strobe mode
KR950024433A (en) Data output circuit and semiconductor memory
KR20010045945A (en) Address transition detection circuit of semiconductor memory
KR960001999A (en) Memory bank select circuit
JPS6061987A (en) Semiconductor memory
KR20010027123A (en) High speed memory device having reduced operation current consumption
KR950003395B1 (en) State control device using address pin
KR960039640A (en) Apparatus comprising logic and memory circuit with reduced input / output signal propagation delay and method of providing same
KR920008770A (en) Timing Control Circuit of Synchronous Memory Device
KR920013146A (en) Fieldbus Interface Board
KR970002664A (en) Control signal supply circuit
KR940016236A (en) Data Output Buffer Enable Signal Generator for Semiconductor Memory Devices
KR960039627A (en) Input buffer of synchronous memory device
KR910003512A (en) Interface circuit between CPU and peripheral I / O

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application