KR960026157A - Manufacturing method of T-shaped metal electrode - Google Patents

Manufacturing method of T-shaped metal electrode Download PDF

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Publication number
KR960026157A
KR960026157A KR1019940033905A KR19940033905A KR960026157A KR 960026157 A KR960026157 A KR 960026157A KR 1019940033905 A KR1019940033905 A KR 1019940033905A KR 19940033905 A KR19940033905 A KR 19940033905A KR 960026157 A KR960026157 A KR 960026157A
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South Korea
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insulating
insulating layer
film
metal electrode
etching
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KR1019940033905A
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Korean (ko)
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KR0150487B1 (en
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박성호
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양숭택
재단법인 한국전자통신연구소
조백제
한국전기통신공사
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Priority to KR1019940033905A priority Critical patent/KR0150487B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0331—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers for lift-off processes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 반도체장치의 제조방법에 관한 것으로서, 식각속도가 상이한 3중층의 절연막을 이용하여 T형 금속전극을 제조하는 방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a T-type metal electrode using a triple layer insulating film having different etching rates.

반도체기판(10)위에 식각속도가 상이한 제1절연층(1), 제2절연층(2) 및 제3절연층(3)을 순차적으로 형성하는 공정과; 상기 제3절연층(3)위에 소정 패턴을 갖는 포토레지스트막(4)을 형성하여, 금속전극이 형성될 영역을 정의하는 공정과; 상기 포토레지스트막(4)을 마스크로 사용하여, 동일한 식각조성하에서 상기 제1,2,3절연층(1,2,3)을 식각하여 식각속도에 따라 제2절연층이 제1절연층과 제3절연층보다 빠른 속도로 과식각되게 하는 공정과; 그위에 금속막(5)을 도포한 다음 상기 기판상의 모든 절연층을 제거하여 상기 기판(10)상에 티형의 금속전극을 형성하는 공정을 포함한다.Sequentially forming a first insulating layer (1), a second insulating layer (2), and a third insulating layer (3) having different etching rates on the semiconductor substrate (10); Forming a photoresist film (4) having a predetermined pattern on the third insulating layer (3) to define a region where a metal electrode is to be formed; Using the photoresist film 4 as a mask, the first, second, and third insulating layers 1, 2, and 3 are etched under the same etching composition to form a second insulating layer and the first insulating layer according to the etching rate. Over-etching at a faster rate than the third insulating layer; Applying a metal film 5 thereon, and then removing all insulating layers on the substrate to form a tee-shaped metal electrode on the substrate 10.

Description

티형(T-shaped) 금속전극의 제조방법Manufacturing method of T-shaped metal electrode

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1A도~제1F도는 본 발명의 금속전극의 제조방법의 공정들을 보여주는 단면도들이다.1A to 1F are cross-sectional views showing processes of the method for manufacturing a metal electrode of the present invention.

Claims (11)

반도체기판(10)위에 식각속도가 상이한 제1절연층(1), 제2절연층(2) 및 제3절연층(3)을 순차적으로 형성하는 공정과; 상기 제3절연층(3)위에 소정 패턴을 갖는 포토레지스트막(4)을 형성하여, 금속전극이 형성될 영역을 정의하는 공정과; 상기 포토레지스트막(4)을 마스크로 사용하여, 동일한 식각조건하에서 상기 제1, 2, 3절연층(1,2,3)을 식각하여, 식각속도에 따라 제2절연층이 제1절연층과 제3절연층보다 빠른 속도로 과식각되게 하는 공정과; 그위에 금속막(5)을 도포한 다음 상기 기판상의 모든 절연층을 제거하여 상기 기판(10)상에 티형의 금속전극을 형성하는 공정을 포함하는 것을 특징으로 하는 티형 금속전극의 제조방법.Sequentially forming a first insulating layer (1), a second insulating layer (2), and a third insulating layer (3) having different etching rates on the semiconductor substrate (10); Forming a photoresist film (4) having a predetermined pattern on the third insulating layer (3) to define a region where a metal electrode is to be formed; Using the photoresist film 4 as a mask, the first, second and third insulating layers 1, 2 and 3 are etched under the same etching conditions, and the second insulating layer is formed as the first insulating layer according to the etching rate. Over-etching at a faster rate than the third insulating layer; And forming a T-type metal electrode on the substrate (10) by applying a metal film (5) thereon and removing all insulating layers on the substrate. 제1항에 있어서, 상기 반도체기판(10)은 반절연성 화합물기판인 것을 특징으로 하는 티형 금속전극의 제조방법.The method of claim 1, wherein the semiconductor substrate (10) is a semi-insulating compound substrate. 제2항에 있어서, 상기 반도체기판(10)내에 이온주입에 의한 전기적 활성층을 형성하는 공정을 부가하는 것을 특징으로 하는 티형 금속전극의 제조방법.The method of manufacturing a tee-type metal electrode according to claim 2, further comprising the step of forming an electrically active layer by ion implantation in the semiconductor substrate (10). 제2항에 있어서, 상기 반도체기판(10)상에 에미터 캡층 또는 오믹접속층을 형성하는 공정을 부가하는 것을 특징으로 하는 티형 금속전극의 제조방법.The method of claim 2, further comprising forming an emitter cap layer or an ohmic connection layer on the semiconductor substrate (10). 제1항에 있어서, 상기 제1절연막(1)과 제3절연막(3)은 전자 사이클로트론 공명화학증착법을 이용하여 형성하는 것을 특징으로 하는 티형 금속전극의 제조방법.The method of claim 1, wherein the first insulating film (1) and the third insulating film (3) are formed using an electron cyclotron resonance chemical vapor deposition method. 제1항 또는 제5항에 있어서, 상기 제1절연막(1)과 제3절연막(3)은 모두 실리콘질화막으로 형성되는 것을 특징으로 하는 티형 금속전극의 제조방법.A method according to claim 1 or 5, wherein the first insulating film (1) and the third insulating film (3) are both formed of a silicon nitride film. 제1항에 있어서, 상기 제1절연막(1)은 400~600nm 두께의 실리콘질화막으로 형성되고, 그리고 제3절연막은 100 내지 150nm의 두께로 실리콘 질화막으로 형성된 것을 특징으로 하는 티형 금속전극의 제조방법.The method of claim 1, wherein the first insulating film 1 is formed of a silicon nitride film having a thickness of 400 to 600 nm, and the third insulating film is formed of a silicon nitride film having a thickness of 100 to 150 nm. . 제1항에 있어서, 상기 제2절연막(2)은 150~200℃의 온도에서, SiH4/NH3혼합가스를 사용하는 통상적인 RF 플라즈마 화학증착법에 의해 형성되는 것을 특징으로 하는 티형 금속전극의 제조방법.The tee type metal electrode according to claim 1, wherein the second insulating film 2 is formed by a conventional RF plasma chemical vapor deposition method using a SiH 4 / NH 3 mixed gas at a temperature of 150 to 200 ° C. Manufacturing method. 제8항에 있어서, 상기 제2절연막은 약 300nm 두께의 실리콘질화막으로 이루어진 것을 특징으로 하는 티형 금속전극의 제조방법.9. The method of claim 8, wherein the second insulating film is made of a silicon nitride film having a thickness of about 300 nm. 제1항에 있어서, 상기 포토레지스트막(4)의 형성공정중에 그의 표면에 돌출부가 형성되게 하는 것을 특징으로 하는 티형 금속전극의 제조방법.The method of manufacturing a tee-type metal electrode according to claim 1, wherein a projection is formed on a surface thereof during the formation process of the photoresist film (4). 제1항에 있어서, 상기 식각공정은 C2F6의 프레온가스를 자계인가형 반응성 이온식각장비내에 주입하고, 13.56MHz의 RF전원과 플라즈마 반응실을 둘러싸고 있는 자기코일에 의해 플라즈마를 발생시키는 조건하에서 실행되는 것을 특징으로 하는 티형 금속전극의 제조방법.The method of claim 1, wherein the etching process is a condition for injecting a C 2 F 6 Freon gas into the magnetic field applied reactive ion etching equipment, and generating plasma by a 13.56 MHz RF power source and a magnetic coil surrounding the plasma reaction chamber. Method for producing a tee-type metal electrode, characterized in that carried out under. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940033905A 1994-12-13 1994-12-13 Fabrication method of t-shape metal electrode KR0150487B1 (en)

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