KR960025501U - 반도체 리드프레임의 패드구조 - Google Patents
반도체 리드프레임의 패드구조Info
- Publication number
- KR960025501U KR960025501U KR2019940033994U KR19940033994U KR960025501U KR 960025501 U KR960025501 U KR 960025501U KR 2019940033994 U KR2019940033994 U KR 2019940033994U KR 19940033994 U KR19940033994 U KR 19940033994U KR 960025501 U KR960025501 U KR 960025501U
- Authority
- KR
- South Korea
- Prior art keywords
- lead frame
- pad structure
- semiconductor lead
- semiconductor
- pad
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83385—Shape, e.g. interlocking features
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019940033994U KR200143924Y1 (ko) | 1994-12-14 | 1994-12-14 | 반도체 리드프레임의 패드구조 |
JP7345711A JP2767404B2 (ja) | 1994-12-14 | 1995-12-08 | 半導体パッケージのリードフレーム構造 |
US08/571,316 US5661338A (en) | 1994-12-14 | 1995-12-12 | Chip mounting plate construction of lead frame for semiconductor package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019940033994U KR200143924Y1 (ko) | 1994-12-14 | 1994-12-14 | 반도체 리드프레임의 패드구조 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960025501U true KR960025501U (ko) | 1996-07-22 |
KR200143924Y1 KR200143924Y1 (ko) | 1999-06-15 |
Family
ID=19401308
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019940033994U KR200143924Y1 (ko) | 1994-12-14 | 1994-12-14 | 반도체 리드프레임의 패드구조 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR200143924Y1 (ko) |
-
1994
- 1994-12-14 KR KR2019940033994U patent/KR200143924Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR200143924Y1 (ko) | 1999-06-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
N231 | Notification of change of applicant | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20090123 Year of fee payment: 11 |
|
EXPY | Expiration of term |