KR960014721B1 - Method of manufacturing dos transistor - Google Patents
Method of manufacturing dos transistor Download PDFInfo
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- KR960014721B1 KR960014721B1 KR1019930012889A KR930012889A KR960014721B1 KR 960014721 B1 KR960014721 B1 KR 960014721B1 KR 1019930012889 A KR1019930012889 A KR 1019930012889A KR 930012889 A KR930012889 A KR 930012889A KR 960014721 B1 KR960014721 B1 KR 960014721B1
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- tungsten silicide
- silicide film
- film
- gate
- temperature
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- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 229910021342 tungsten silicide Inorganic materials 0.000 claims abstract description 43
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 15
- 230000008569 process Effects 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 229910052731 fluorine Inorganic materials 0.000 claims description 15
- 239000011737 fluorine Substances 0.000 claims description 15
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 claims description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 229920005591 polysilicon Polymers 0.000 claims description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims 1
- 238000000059 patterning Methods 0.000 abstract 1
- 229920001296 polysiloxane Polymers 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 description 4
- -1 fluorine ions Chemical class 0.000 description 4
- 238000002955 isolation Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 230000005012 migration Effects 0.000 description 2
- 238000013508 migration Methods 0.000 description 2
- 229910018557 Si O Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- KEKAYANIOKYSFL-UHFFFAOYSA-N silane tungsten Chemical compound [SiH4].[W] KEKAYANIOKYSFL-UHFFFAOYSA-N 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- WNUPENMBHHEARK-UHFFFAOYSA-N silicon tungsten Chemical compound [Si].[W] WNUPENMBHHEARK-UHFFFAOYSA-N 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
제1도 내지 제4도에 의해 본 발명의 MOS트랜지스터의 폴리사이드 구조의 게이트를 제조하는 단계를 도시한 단면도.1 through 4 are cross-sectional views showing the steps of manufacturing a gate of the polyside structure of the MOS transistor of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 실리콘기판 2 : 소자분리막1: silicon substrate 2: device isolation film
3 : 게이트 산화막 4 : 폴리실리콘층3: gate oxide film 4: polysilicon layer
5 : 제1텅스텐 실리사이드막 6 : 제2텅스텐 실리사이드막5: first tungsten silicide film 6: second tungsten silicide film
7 : 제3텅스텐 실리사이드막 10 : 게이트7: third tungsten silicide film 10: gate
본 발명은 고집적 반도체소자인 MOS트랜지스터 제조방법에 관한 것으로, 특히 텅스텐 실리사이드막를 증착할때 다른 조건을 갖는 3단계 공정에 걸쳐 텅스텐 실리사이드를 증착하여 게이트 산화막에 대한 불소(Fluorine)이온의 영향을 줄여 게이트 산화막 특성을 개선시킨 MOS트랜지스터 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a MOS transistor, which is a highly integrated semiconductor device, and in particular, by depositing tungsten silicide over a three-step process having different conditions when depositing a tungsten silicide film, the effect of fluorine ions on the gate oxide film is reduced. The present invention relates to a MOS transistor manufacturing method having improved oxide film characteristics.
현재 일반적으로 텅스텐 폴리사이드 구조를 게이트에 적용할때 WF6와 SiH4환원에 의한 CVD(Chemical Vapour Deposition)로 텅스텐 실리사이드를 증착하는데 면저항 개선에서 폴리실리콘층만 이용한 게이트에 비해 장점이 있지만 텅스텐 실리사이드(WSix)막내에 포함되어 있는 불소이온이 다음과 같은 메카니즘(Mechanism)에 의해 게이트 산화막에 영향을 미친다.Currently, when tungsten polyside structure is applied to the gate, tungsten silicide is deposited by chemical vapor deposition (CVD) by WF 6 and SiH 4 reduction. Tungsten silicide ( The fluorine ions contained in the WSi x ) film affect the gate oxide film by the following mechanism (Mechanism).
즉, 불소이온(F)은 게이트 산화막(SiO2)내에 있는 약한 Si-O결합을 끊고 O를 대체함으로써 전자트랩을 형성하여, 이때 분해된 O는 폴리실리콘과 실리콘기판쪽으로 확산하여 부가적인 산화막을 형성함으로써 쓰레쉬홀드 전압의 변화, 게이트 산화막의 TDDB(Constant Current Stress Test, Breakdown Voltage)특성의 열화를 유발시켜 소자를 제거하는데 많은 문제점을 야기한다.In other words, fluorine ion (F) forms an electronic trap by breaking the weak Si—O bond in the gate oxide film (SiO 2 ) and replacing O, where the decomposed O diffuses toward the polysilicon and silicon substrate to form an additional oxide film. Formation causes a change in the threshold voltage and deterioration of the TDDB (Constant Current Stress Test, Breakdown Voltage) characteristics of the gate oxide, which causes many problems in removing the device.
모노 사이렌(Mono Silane) 텅스텐 실리사이드막내에 있는 불소(fluorine)는 균일한 분포로 이루어지는데 후속공정에서 열(Thermal)공정을 가하면 불소는 농도구배(Grandient)에 의해 폴리실리콘층을 통과하여 게이트 산화막으로 확산됨으로 인하여 게이트 산화막에 불소 피크를 형성하고 또다른 불소이온은 텅스텐 실리사이드막 표면으로 확산된다.The fluorine in the monosilane tungsten silicide film has a uniform distribution. When the thermal process is applied in the subsequent process, the fluorine passes through the polysilicon layer by the concentration gradient to the gate oxide film. The diffusion forms fluorine peaks in the gate oxide film and another fluorine ion diffuses to the surface of the tungsten silicide film.
일번적으로 불순물 원자의 이동은 농도구배에 의해 고농도 위치에서 저농도 위치로 이동하는데 이때의 식은(J : 원자흐름, D : 특정솔벤트에서 확산상수, △x : 위치차이, △c : 농도경사)으로 표현된다. 이때 확산상수 D는(D0: 원자나 격자구조에서 움직이는데 필요한 포텔셜 베리어를 얻는데 필요한 주파수, Ea : Energy Barrier height, T : 온도)의 식으로 표현된다.In general, the movement of impurity atoms moves from the high concentration position to the low concentration position by the concentration gradient. (J: atomic flow, D: diffusion constant in a specific solvent, Δx: position difference, Δc: concentration gradient). Where the diffusion constant D is It is expressed as the formula (D 0 : frequency required to obtain the potential barrier to move in an atom or lattice structure, Ea: Energy Barrier height, T: temperature).
따라서, 본 발명은 상기와 같은 원자이동의 원리를 이용하여 모노 사이렌 실리사이드막 내에 불소이온의 농도를 다르게 함으로써 불소이온이 폴리실리콘층과 그 하부의 게이트 산화막으로 이용하는 것을 감소시켜 게이트 산화막의 특성을 향상시키는 MOS트랜지스터 제조방법을 제공하는데 그 목적이 있다.Accordingly, the present invention improves the characteristics of the gate oxide film by reducing the use of fluoride ions as the polysilicon layer and the gate oxide film below by varying the concentration of fluorine ions in the mono siren silicide film using the principle of atomic migration as described above. It is an object of the present invention to provide a MOS transistor manufacturing method.
이하, 첨부된 도면을 참조하여 본 발명을 상세히 설명하기로 한다.Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.
제1도 내지 제4도는 본 발명에 의해 MOS트랜지스터의 게이트를 폴리사이드 구조로 제조하는 단계를 도시한 단면도이다.1 through 4 are cross-sectional views illustrating the steps of fabricating a gate of a MOS transistor into a polyside structure according to the present invention.
제1도는 실리콘기판(1)의 소정부분에 소자분리막(2)을 형성하고, 소자분리막(2)와 실리콘기판(1) 상부에 게이트 산화막(3)과 도프된 폴리실리콘층(4)을 각각 예정된 두께로 적층하고, 폴리실리콘층(4) 상부면에 Si/W조성비가 2.6정도의 제1텅스텐 실리사이드막(5)을 390∼400℃의 온도에서 일정두께 증착한 단면도이다.FIG. 1 shows the device isolation film 2 formed on a predetermined portion of the silicon substrate 1 and the gate oxide film 3 and the doped polysilicon layer 4 on the device isolation film 2 and the silicon substrate 1, respectively. It is sectional drawing which laminated | stacked to predetermined thickness, and deposited the 1st tungsten silicide film 5 of Si / W composition ratio about 2.6 on the upper surface of the polysilicon layer 4 at the temperature of 390-400 degreeC.
제2도는 제1도 공정후, 제1텅스텐 실리사이드막(5) 상부에 Si/W의 조성비가 2.8정도인 제2텅스텐 실리사이드막(6)을 450∼500℃의 온도에서 증착한 단면도로서, 제2텅스텐 실리사이드막(6)에는 불소의 양은 줄어들고 반대로 실리콘의 양은 많아진다.FIG. 2 is a cross-sectional view of depositing a second tungsten silicide film 6 having a Si / W composition ratio of about 2.8 on the first tungsten silicide film 5 at a temperature of 450 to 500 ° C. after the first drawing process. In the tungsten silicide film 6, the amount of fluorine decreases and, on the contrary, the amount of silicon increases.
제3도는 제2도 공정후, SiH4/WF6의 유량을 조절하여 Si/W의 조성비가 약 2.0정도인 제3텅스텐 실리사이드막(7)을 390∼400℃의 온도에서 증착한 단면도로서, 제1텅스텐 실리사이드막(5)/제2텅스텐 실리사이드막(6)/제3텅스텐 실리사이드막(7)의 Si/W의 조성비는 2.6/2.8/2.0이며 불소의 농도는 많음/적음/많음의 형태가 된다.3 is a cross-sectional view of depositing a third tungsten silicide film 7 having a composition ratio of Si / W of about 2.0 by adjusting the flow rate of SiH 4 / WF 6 after the process of FIG. The composition ratio of Si / W of the first tungsten silicide film 5 / the second tungsten silicide film 6 / the third tungsten silicide film 7 is 2.6 / 2.8 / 2.0 and the concentration of fluorine is high / low / high Becomes
제4도는 제3도의 공정후, 패턴닝 공정으로 제3/제2/제1텅스텐 실리사이드막(7,6,5)과 폴리실리콘층(4) 일정부분을 식각하여 폴리사이드 구조의 게이트(10)를 형성한 단면도로서, 이후 공정에서 고온공정 예를 들어 확산공정이나, 산화공정을 실시하게 되면 텅스텐 실리사이드막 상호간에 불소이동에 대한 Ea(에너지 베리어높이)는 폴리실리콘층/제1텅스텐 실리사이드막>제1텅스텐 실리사이드/제2텅스텐 실리사이드>제1텅스텐 실리사이드막/표면의 순서로 된다. 즉, Ea가 크다는 것은 불소이동이 어렵다는 것을 의미하게 되는데 제1텅스텐 실리사이드에서의 불소는 폴리실리콘층 방향보다는 제2텅스텐 실리사이드 쪽으로 이동될 것이고, 제3텅스텐 실리사이드 내의 불소는 외부표면으로 이동될 것이다.FIG. 4 is a polyside gate 10 by etching a portion of the third, second, and first tungsten silicide layers 7, 6, and 5 and the polysilicon layer 4 after the process of FIG. ) Is a cross-sectional view of a polysilicon layer and a first tungsten silicide film in which the Ea (energy barrier height) for fluorine transfer between the tungsten silicide films is subjected to a high temperature process such as a diffusion process or an oxidation process in a subsequent process. > First tungsten silicide / second tungsten silicide> first tungsten silicide film / surface. In other words, a large Ea means that fluorine migration is difficult. The fluorine in the first tungsten silicide will move toward the second tungsten silicide rather than the polysilicon layer direction, and the fluorine in the third tungsten silicide will move to the outer surface.
따라서, 제2텅스텐 실리사이드막은 제1텅스텐 실리사이드막의 불소를 흡수하는 역할을 하게됨으로서 게이트 산화막으로 비치는 불소의 영향을 감소시켜 게이트 산화막의 TDDB특성을 향상시키게 된다.Accordingly, the second tungsten silicide film serves to absorb fluorine in the first tungsten silicide film, thereby reducing the influence of fluorine on the gate oxide film, thereby improving the TDDB characteristics of the gate oxide film.
그리고 상대적으로 높는 온도(450∼500℃)에서 텅스텐 실리사이드막을 증착함으로써 결정화가 더 이루어져 텅스텐 실리콘막의 온도에 대한 스트레스변화는 390∼400℃에서 증착된 텅스텐 실리사이드막에 비해 낮음으로써 게이트 산화막에 미치는 영향이 감소할 것이다.Further, crystallization is further performed by depositing a tungsten silicide film at a relatively high temperature (450-500 ° C.), so that the stress variation on the temperature of the tungsten silicon film is lower than that of the tungsten silicide film deposited at 390-400 ° C. Will decrease.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019930012889A KR960014721B1 (en) | 1993-07-09 | 1993-07-09 | Method of manufacturing dos transistor |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019930012889A KR960014721B1 (en) | 1993-07-09 | 1993-07-09 | Method of manufacturing dos transistor |
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| Publication Number | Publication Date |
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| KR950004457A KR950004457A (en) | 1995-02-18 |
| KR960014721B1 true KR960014721B1 (en) | 1996-10-19 |
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| KR1019930012889A KR960014721B1 (en) | 1993-07-09 | 1993-07-09 | Method of manufacturing dos transistor |
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