KR960009396A - Weight Generator with De-Flip-Flop - Google Patents

Weight Generator with De-Flip-Flop Download PDF

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Publication number
KR960009396A
KR960009396A KR1019940021845A KR19940021845A KR960009396A KR 960009396 A KR960009396 A KR 960009396A KR 1019940021845 A KR1019940021845 A KR 1019940021845A KR 19940021845 A KR19940021845 A KR 19940021845A KR 960009396 A KR960009396 A KR 960009396A
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KR
South Korea
Prior art keywords
flip
gate
flop
output
receiving
Prior art date
Application number
KR1019940021845A
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Korean (ko)
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KR970006624B1 (en
Inventor
하현우
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940021845A priority Critical patent/KR970006624B1/en
Publication of KR960009396A publication Critical patent/KR960009396A/en
Application granted granted Critical
Publication of KR970006624B1 publication Critical patent/KR970006624B1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037Bistable circuits

Abstract

본 발명은 웨이트 제너레이터를 설계함에 있어 J-K플립플롭 대신 D-플립플롭을 사용하여 설계하므로써 간편하게 갈(GAL)소자 등을 이용할 수 있도록 한 D-플립플롭을 이용한 웨이트 제너레이터에 관한 것으로, 종래에는 JK-플립플롭을 사용하므로 인해 트랜지스터 소자를 사용한 논리회로를 여러개 사용하거나 값비싼 EPLD를 사용하여야만 가능한 문제점이 있었는바, 본 발명은 종래의 이런 문제점을 감안하여 JK-플립플롭 대신 D-플립플롭으로 설계하여 종래의 기능은 그대로 수행하면서 간편하게 갈 소자 등을 이용할 수 있도록 한 웨이트 제너레이터를 제공함으로써, 갈(GAL)등 가격이 저렴하고 간편한 프로그램블 디바이스에 적용이 가능하여 회로설계시 용이하고, 경제적인 부담도 줄어드는 효과가 있다.The present invention relates to a weight generator using a D-flip flop, which makes it possible to easily use a GAL element by designing a D-flip flop instead of a JK flip flop in designing a weight generator. Due to the use of flip-flops, there were problems caused only by using multiple logic circuits using transistor elements or by using expensive EPLDs. The present invention has been designed as a D-flip flop instead of a JK-flip flop in view of the conventional problems. By providing a weight generator that can use a simple device while performing conventional functions as it is, it is possible to apply to a low cost and simple programmable device such as GAL, so that it is easy and economical when designing a circuit. It has a decreasing effect.

Description

디-플립플롭을 이용한 웨이트 제너레이터Weight Generator with De-Flip-Flop

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명 웨이트 제너레이터의 회로도.3 is a circuit diagram of a weight generator of the present invention.

Claims (2)

JK-플립플롭을 사용하여 설계하는 웨이트 제너레이터에 있어서, 2웨이트 칩 셀렉트 신호(2WCS)를 입력받는 앤드게이트(5)와; 상기 앤드게이트(5)에서 출력된 신호와 클럭 및 리셋신호를 입력받는 제1플립플롭(6)과; 클럭 및 리셋신호를 입력받아 익스클루시브오아게이트(7-1) 및 앤드게이트(5-2)로 값을 출력하는 제2플립플롭(6-1)과; 상기 앤드게이트(5)와 제1플립플롭(6)에서 출력된 값을 입력받는 익스클루시브오아게이트(7)와; 제1플립플롭(6)의 출력값과 상기 익스클루시브오아게이트(7)에서 출력된 신호를 입력받는 앤드게이트(5-1)와; 제2플립플롭(6-1)의 출력값과 상기 앤드게이트(5)에서 출력된 신호를 입력받는 익스클루시브오아게이트(7-1)와; 제2플립플롭(6-1)에서 출력된 값과 상기 익스클루시브오아게이트(7-2)에서 출력된 신호를 입력받는 앤드게이트(5-2) 및; 상기 앤드게이트(5-1) 및 앤드게이트(5-2)에서 출력된 값을 입력받아 최종적으로 오아시킨 후 인버터하여 레디아웃 신호를 출력하는 노아게이트(8)로 구성함을 특징으로 하는 디-플립플롭을 이용한 웨이트 제너레이터.1. A weight generator designed using a JK flip-flop, comprising: an AND gate (5) receiving a two-weight chip select signal (2WCS); A first flip-flop (6) for receiving a signal output from the AND gate (5), a clock and a reset signal; A second flip-flop 6-1 that receives a clock and reset signal and outputs a value to the exclusive oar gate 7-1 and the AND gate 5-2; An exclusive oar gate 7 which receives values output from the AND gate 5 and the first flip-flop 6; An AND gate 5-1 receiving an output value of the first flip-flop 6 and a signal output from the exclusive or gate 7; An exclusive orifice 7-1 receiving an output value of the second flip-flop 6-1 and a signal output from the AND gate 5; An AND gate 5-2 for receiving a value output from the second flip-flop 6-1 and a signal output from the exclusive ogate 7-2; And a noa gate (8) for receiving a value output from the AND gate (5-1) and the AND gate (5-2) and finally inverting the inverter to output a ready-out signal. Weight generator using flip flop. 제1항에 있어서, 상기 제1, 제2플립플롭(6,6-1)이 하기와 같은 부울린 식이 내장된 프로그램블 디바이스와 교환가능 함을 특징으로 하는 디-플립플롭을 이용한 웨이트 제너레이터.The weight generator using a de-flip flop according to claim 1, wherein the first and second flip-flops (6,6-1) are interchangeable with a programmable device having a Boolean expression as follows. 2웨이트를 필요로 하는 디바이스의 칩 셀렉트를 CS라 하면,If the chip select of a device requiring two weights is CS, Q1 : = CSQ1: = CS Q2 : = Q1Q2: = Q1 READY = /(((CS : + : Q1) * Q1) + ((CS : + : Q2) * Q2))READY = / (((CS: +: Q1) * Q1) + ((CS: +: Q2) * Q2)) ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940021845A 1994-08-31 1994-08-31 Weight generator for d flip-flop KR970006624B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940021845A KR970006624B1 (en) 1994-08-31 1994-08-31 Weight generator for d flip-flop

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940021845A KR970006624B1 (en) 1994-08-31 1994-08-31 Weight generator for d flip-flop

Publications (2)

Publication Number Publication Date
KR960009396A true KR960009396A (en) 1996-03-22
KR970006624B1 KR970006624B1 (en) 1997-04-29

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KR1019940021845A KR970006624B1 (en) 1994-08-31 1994-08-31 Weight generator for d flip-flop

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100465873B1 (en) * 1997-09-03 2005-05-18 삼성전자주식회사 Clock hold circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100465873B1 (en) * 1997-09-03 2005-05-18 삼성전자주식회사 Clock hold circuit

Also Published As

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KR970006624B1 (en) 1997-04-29

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