KR960009185A - Capacitor Manufacturing Method of Semiconductor Device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device, and the high integration of the semiconductor device has caused many problems by requiring more capacitance in a small area. Therefore, the present invention is to deposit a plurality of insulating films having different etch selectivity during wet etching, then forming a contact hole using a contact mask, and depositing a first conductive layer on the entire structure, and then depositing an insulating film thereon After forming an insulating film pattern by a visual process using a storage electrode mask and an etching selectivity, a second conductive layer is mounted on the entire structure, the insulating films are exposed by an anisotropic etching process, and the first conductive layer is removed by removing the insulating films. And a second conductive layer and a storage electrode having an increased surface area, and a dielectric film and a plate electrode formed thereon to secure sufficient capacitance to enable high integration of semiconductor devices.

Description

Capacitor Manufacturing Method of Semiconductor Device

Since this is an open matter, no full text was included.

2A to 2E are sectional views showing a capacitor manufacturing process of a semiconductor device according to the present invention.

Claims (7)

A method of manufacturing a capacitor of a semiconductor device, comprising: sequentially depositing a first insulating film, a second insulating film, a third insulating film, a fourth insulating film, and a fifth insulating film on a semiconductor substrate, and forming a contact mask thereon; Forming a contact hole exposing a predetermined portion of the semiconductor substrate by sequentially etching the fifth insulating film, the fourth insulating film, the third insulating film, the second insulating film, the first insulating film and the lower insulating layer using a mask; Depositing a first conductive layer to a predetermined thickness so as to be connected to the semiconductor substrate through the contact hole, depositing a sixth insulating layer on the first conductive layer, and forming a storage electrode mask thereon; The sixth insulating layer, the first conductive layer, the fifth insulating layer, the fourth insulating layer, the third insulating layer, and the second insulating layer are sequentially etched using an electrode mask, and the second insulating layer and the fourth insulating layer are formed. Forming a sixth insulating layer pattern, a first conductive layer pattern, a fourth insulating layer pattern, a fourth insulating layer pattern, a third insulating layer pattern, and a second insulating layer pattern by widthwise side etching, and removing the storage electrode mask, Depositing a second conductive layer on the substrate, and anisotropically etching the second conductive layer to form a second conductive layer spacer, wherein the sixth insulating layer, the fifth insulating layer pattern, the fourth insulating layer pattern, the third insulating layer pattern, A method for manufacturing a capacitor of a semiconductor device comprising the step of forming a storage electrode having an increased surface area by removing the second insulating pattern and the first insulating layer by a wet method. The method of claim 1, wherein the second insulating layer and the fourth insulating layer use a material having a better etching selectivity during wet etching than the first insulating layer, the third insulating layer, and the fifth insulating layer. The method of claim 1 or 2, wherein the second insulating film and the fourth insulating film are formed of PSG. 4. The semiconductor device of claim 3, wherein the thickness of the second and fourth insulating layers is increased to increase the area when the second conductive layer is deposited along the bend during deposition of the second conductive layer after side width etching. Capacitor Manufacturing Method. The method of claim 1, wherein the first insulating film, the third insulating film, and the fifth insulating film are formed of TEOS. The method of claim 1, wherein the side etching is performed using a 50: 1 HF solution. The method of claim 1, wherein the insulating film removing process is performed using a BOE solution or an HF solution. ※ Note: The disclosure is based on the initial application.