KR960005812A - Insulation Planarization Method - Google Patents

Insulation Planarization Method Download PDF

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Publication number
KR960005812A
KR960005812A KR1019940016354A KR19940016354A KR960005812A KR 960005812 A KR960005812 A KR 960005812A KR 1019940016354 A KR1019940016354 A KR 1019940016354A KR 19940016354 A KR19940016354 A KR 19940016354A KR 960005812 A KR960005812 A KR 960005812A
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KR
South Korea
Prior art keywords
ion implantation
film
insulating film
forming
implantation mask
Prior art date
Application number
KR1019940016354A
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Korean (ko)
Inventor
김시범
Original Assignee
김주용
현대전자산업 주식회사
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Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940016354A priority Critical patent/KR960005812A/en
Publication of KR960005812A publication Critical patent/KR960005812A/en

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

본 발명은 반도체 소자 제조공정 중 절연막 평탄화 방법에 관한 것으로, 절연평탄화 부위에 절연막(22)을 형성하는 단계; 상대적으로 단차가 낮은 부분에 이온주입마스크막(23)을 형성하는 단계; 상기 이온주입마스크막(23)을 차단막으로 단차가 높은 부분에 불순물을 이온 주입하는 단계; 이온주입영역과 이온주입 되지 않는 영역간의 식각을 차이를 이용하여 습식식각하는 단계를 포함하여 이루어지는 것을 특징으로 한다.The present invention relates to a method of planarizing an insulating film during a semiconductor device manufacturing process, comprising: forming an insulating film 22 at an insulating planarization site; Forming an ion implantation mask film 23 in a portion where the step is relatively low; Implanting impurities into the portion having a high level of step by using the ion implantation mask layer 23 as a blocking layer; Wet etching using the difference between the ion implantation region and the non-ion implantation region characterized in that it comprises a step.

Description

절연막 평탄화 방법Insulation Planarization Method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래 방법에 따른 절연막 평탄화 후의 단면도이다.1 is a cross-sectional view after planarizing the insulating film according to the conventional method.

제2A도 내지 제2C도는 본 발명에 따른 일실시예의 절연막 평탄화 공정 단면도이다.2A to 2C are cross-sectional views of an insulating film planarization process in one embodiment according to the present invention.

Claims (5)

반도체 소자 제조공정 중 절연막 평탄화 방법에 있어서,절연평탄화 부위에 절연막(22)을 형성하는 단계; 상대적으로 단차가 낮은 부분에 이온주입마스크막(23)을 형성하는 단계; 상기 이온주입마스크막(23)을 차단막으로 단차가 높은 부분에 불순물을 이온 주입하는 단계; 이온주입영역과 이온주입 되지 않는 영역간의 식각을 차이를 이용하여 습식식각하는 단계를 포함하여 이루어지는 것을 특징으로 하는 절연막 평탄화 방법.A method of planarizing an insulating film during a semiconductor device manufacturing process, the method comprising: forming an insulating film 22 at an insulating planarization site; Forming an ion implantation mask film 23 in a portion where the step is relatively low; Implanting impurities into the portion having a high level of step by using the ion implantation mask layer 23 as a blocking layer; And wet etching the etching between the ion implantation region and the non-ion implantation region by using a difference. 제1항에 있어서, 상기 절연막(22)은 BPSG막인 것을 특징으로 하는 절연막 평탄화 방법.The method of claim 1, wherein the insulating film (22) is a BPSG film. 제1항에 있어서, 이온주입마스크막(23)은 감광막인 것을 특징으로 하는 절연막 평탄화 방법.The method of claim 1, wherein the ion implantation mask film is a photosensitive film. 제2항에 있어서, 상기 주입되는 불순물을 인(P) 이온인 것을 특징으로 하는 절연막 평탄화 방법.The method of claim 2, wherein the implanted impurity is phosphorus (P) ions. 제4항에 있어서,상기 이온주입영역과 이온주입 되지 않은 영역간의 식각률 차이를 이용한 습식식각시 식각제는 불산(HF)용액인 것을 특징으로 하는 절연막 평탄화 방법.The method of claim 4, wherein the etching agent is a hydrofluoric acid (HF) solution. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940016354A 1994-07-07 1994-07-07 Insulation Planarization Method KR960005812A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940016354A KR960005812A (en) 1994-07-07 1994-07-07 Insulation Planarization Method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940016354A KR960005812A (en) 1994-07-07 1994-07-07 Insulation Planarization Method

Publications (1)

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KR960005812A true KR960005812A (en) 1996-02-23

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KR1019940016354A KR960005812A (en) 1994-07-07 1994-07-07 Insulation Planarization Method

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117096017A (en) * 2023-10-20 2023-11-21 合肥晶合集成电路股份有限公司 Semiconductor structure and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117096017A (en) * 2023-10-20 2023-11-21 合肥晶合集成电路股份有限公司 Semiconductor structure and preparation method thereof

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