KR960004903B1 - Preparing method of semiconductor devices - Google Patents

Abstract

The method of fabricating a semiconductor device is proceeded in such a manner that amorphous silicon is deposited on a substrate(1) and undergoes rapid thermal process to form crystalline nucleus, and then the amorphous silicon undergoes low temperature thermal process to grow grain boundary, thereby forming polycrystalline silicon(3) in high quality.

Description

Manufacturing Method of Semiconductor Device

1 is a cross-sectional view showing the structure of a semiconductor device manufactured by a conventional manufacturing method.

FIG. 2 is a process flowchart for explaining a method of forming polycrystalline silicon used as an active layer when manufacturing the semiconductor device of FIG.

3A to 3C are cross-sectional views showing processes for forming a polysilicon film used as an active layer on a substrate according to the manufacturing method of the present invention.

4 is a flow chart showing the flow of processes shown in FIGS. 3A-3C.

* Explanation of symbols for main parts of the drawings

1: silicon wafer or glass substrate

2,4,7 silicon dioxide

3: polycrystalline silicon or polysilicon

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a polycrystalline silicon film used as an active layer in a thin film transistor or the like.

The present invention is to improve the electrical properties and uniformity of the polycrystalline silicon thin film, as well as to improve the productivity decrease due to long-term thermal annealing during conventional solid phase crystallization (solid phase crystallization).

In general, a polycrystalline silicon thin film transistor is used as a switching element or driving circuit of a high density, high definition liquid crystal display (LCD), and in particular, a highly integrated, low power consumption static SRAM of 4 Mbit or more. It is applied as a pull-up device of RAM: SRAM.

The structure of such a polysilicon thin film transistor is shown in FIG. As shown in FIG. 1, a silicon oxide film 2 is deposited on a silicon wafer 1 using low pressure chemical vapor deposition (LPCVD), and a plasma chemical vapor phase is deposited on the silicon oxide film (2). Amorphous silicon is deposited by plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition to form a polycrystalline silicon film 3 in a solid phase or liquid phase crystallization state.

Next, the active area of the transistor is defined by lithography and dry etching, and then the gate silicon oxide film 4 is formed using a general LSI self-aligned technique. A gate polycrystalline silicon film 5, a source / drain 6, an isolation silicon oxide film 7, and a metal electrode 8 are formed in this order to complete the manufacture of the thin film transistor. do.

When the wafer 1 is used as a glass substrate instead of a silicon substrate, it is not necessary to form the silicon oxide film 2 on this substrate.

In the thin film transistor of FIG. 1, polycrystalline silicon 3 as an active layer is formed on a wafer by the following method.

First, amorphous silicon is generally deposited on a wafer at 600 ° C. or lower by chemical vapor deposition, or a polycrystalline silicon film is deposited on the wafer at 600 ° C. or higher, and the deposited polysilicon film is silicon magnetic ion-implanted. It is made of amorphous silicon with (Si + self ion-implantaion).

Subsequently, polycrystalline silicon 3 capable of being finally formed as an active layer is formed by a process of solid crystallization by electric annealing or liquid crystallization by laser annealing.

As such, in order to form a polycrystalline silicon film of the active layer, a solid phase crystallization method which is advantageous in thin film uniformity and productivity is widely used.

The solid phase crystallization mechanism is a method of crystallizing an amorphous material without dissolving the material. It is composed of two processes, crystal nucleation and grain growth.

As shown in FIG. 2, the deposition of amorphous silicon on the substrate or the amorphous crystallization of polycrystalline silicon is carried out (Stem 21, step 22), followed by two heat treatment methods of solid-state crystallization which are currently widely used. It can be.

One method is to heat the amorphous silicon formed on the wafer at a relatively low temperature of 600 DEG C or lower for at least 20 hours (step 23a), thereby forming a polycrystalline silicon film as an active layer.

Since the crystal grains in the polycrystalline silicon film produced by this method are large in size, defects in the crystal grains are large, and heat treatment time in the process is long, resulting in low productivity.

Another method is rapid thermal annealing (RTA) of amorphous silicon formed on a wafer at a high temperature of 700 ° C. or more (step 23b) to form a polycrystalline silicon film as an active layer (step 24B).

Compared with the previous method, this method can shorten the process time relatively, but the crystal grains of the polycrystalline silicon film are small and the uniformity of the thin film is poor.

In addition, if the heat treatment time is longer than a few minutes has a disadvantage that can not be applied to the liquid crystal display can not use a low-cost glass substrate.

In the two conventional methods described above, the crystallization mechanism shows that crystal nucleation and crystal grain growth are performed at the same temperature so that nucleation is too late when the polysilicon film is formed at low temperature (below 600 ° C). This results in a long incubation time and low L energy, resulting in many microtwin and twin boundary crystal defects.

In particular, when the polycrystalline silicon film forming process is performed at a high temperature, excessive crystal nuclei are generated during the heat treatment time, so that the crystal grains are small and the heat treatment time is short.

Accordingly, it is an object of the present invention to provide a method for manufacturing a semiconductor device for producing polycrystalline silicon by a solid-phase crystallization method in which crystal nucleation and grain growth are separately performed at different temperatures to compensate for these disadvantages.

In order to achieve the above object, the semiconductor device manufacturing method according to an aspect of the present invention, when forming a polycrystalline silicon film, generates crystal nuclei of an amorphous silicon film formed on a substrate for 20 seconds at a high temperature of 600 ℃ or more, and then 600 ℃ Characterized in that the crystallization by separating the process of growing the grains for 6 hours at a low temperature below.

In the above method, instead of the deposited amorphous silicon film, polycrystalline silicon can be used by being amorphous by silicon self-ion injection.

In addition, the substrate may be a silicon wafer or a glass substrate.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In FIG. 3A, a silicon oxide film 32 is formed on the prepared silicon wafer 31. FIG.

Subsequently, as shown in FIG. 3B, an amorphous silicon 33 is deposited on the silicon oxide film 32 by using a plasma chemical vapor deposition method or a low pressure chemical vapor deposition method, or a polycrystalline silicon film is deposited on the silicon oxide film. After deposition on (32), the polycrystalline silicon is amorphous by Si + ion implantation.

Thereafter, the amorphous silicon thin film 33 is first heat-treated at a high temperature in a short time using a rapid heat treatment agent to generate crystal nuclei of a suitable size and density, and then, the pre-generated crystal nuclei are grown at a relatively low temperature to produce high quality polycrystalline silicon. Form as in Figure 3b.

When the polycrystalline silicon film 33 formed as shown in FIG. 3B is formed by using lithography and dry etching, the active region of the transistor is defined and the polysilicon film in portions other than the active region is removed to form the structure of FIG. 3C. The thin film transistor is then completed using common LSI self-alignment technology.

As described above, referring to FIG. 4, the steps 41 and 42 are performed at 600 DEG C in a rapid heat treatment apparatus. After heat treatment at a high temperature in a short time (step 43) to generate crystal nuclei of a suitable density and size, and then grown crystal grains in a low-temperature electric furnace of 600 ℃ or less (step 44) to form a high-quality polycrystalline silicon ( Step 45).

It is important to control the polycrystalline silicon film formation process to have an optimal amount of crystal nuclei when generating crystal nuclei in a given amorphous silicon thin film, and to suppress the formation of new nuclei when growing pre-generated crystal grains at 600 ° C or lower. will be.

In crystal nuclei produced during grain growth, the nuclei density of the thin film is increased, and the grain size of the finally obtained polycrystalline silicon is not only reduced, but also the uniformity of the grain size is reduced.

When grain growth is carried out at 600 ° C. or lower, new nucleation can be sufficiently suppressed because the temperature dependency of crystal nucleation is greater than grain growth.

For a specific embodiment of the present invention, amorphous silicon (thickness 500Å) deposited by low pressure chemical vapor deposition using SiH ₄ at 520 ° C. is heat-treated at 750 ° C. for 20 seconds using a rapid heat processor to generate crystal nuclei, and then to 590 ° C. When the crystal grains are grown by heat treatment in an electric furnace for 6 hours, it is possible to obtain uniform high quality polycrystalline silicon having a crystal grain size of about 2200 GPa.

Under the above process conditions, the present invention may be sufficiently used for an LCD process using a glass substrate.

Claims (3)

In the method of manufacturing a thin film transistor, when forming a polycrystalline silicon film, crystal nuclei of an amorphous silicon film formed on the substrate 31 are formed for 20 seconds at a high temperature of 600 ° C. or higher, and crystal grains are grown for 6 hours at a low temperature of 600 ° C. or lower. A method of manufacturing a semiconductor device, characterized in that to separate the crystallization process. The method of manufacturing a semiconductor device according to claim 1, wherein polycrystalline silicon is amorphized by silicon self-ion implantation in place of the deposited amorphous silicon. The method of manufacturing a semiconductor device according to claim 1, wherein said substrate (31) is a silicon wafer or a glass substrate.