KR950028011A - Manufacturing method of thin film transistor for liquid crystal display device - Google Patents

Manufacturing method of thin film transistor for liquid crystal display device Download PDF

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Publication number
KR950028011A
KR950028011A KR1019940005868A KR19940005868A KR950028011A KR 950028011 A KR950028011 A KR 950028011A KR 1019940005868 A KR1019940005868 A KR 1019940005868A KR 19940005868 A KR19940005868 A KR 19940005868A KR 950028011 A KR950028011 A KR 950028011A
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South Korea
Prior art keywords
thin film
film transistor
active layer
forming
pixel
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KR1019940005868A
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Korean (ko)
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KR0166910B1 (en
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양명수
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이헌조
엘지전자 주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259—Multistep manufacturing methods
    • H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate

Abstract

본 발명은 액정표시소자용 박막트랜지스터 제조방법에 관한 것으로, 게이트와 소오스간의 커패시턴스를 줄여 화소부의 플릭커현상을 없애고 구동회로부의 구동주파수를 높여 우수한 특성을 갖는 액정표시소자용 박막트랜지스터를 제조하기 위한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a thin film transistor for a liquid crystal display device, to reduce the capacitance between the gate and the source, to eliminate the flicker phenomenon of the pixel portion, and to increase the driving frequency of the driving circuit portion to manufacture the thin film transistor for liquid crystal display device. .

본 발명은 구동회로부 영역 및 화소부 영역을 포함하는 투명절연기판위에 열화학기상증착법에 의해 비정질실리콘을 증착하는 공정과, 상기 비정질실리콘층을 패터닝하여 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴을 레이저어닐링에 의해 선택적으로 결정화하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 수소화하여 구동회로부 박막트랜지스터의 다결정실리콘 활성층 및 화소부 박막트랜지스터의 비정질수소화실리콘 활성층을 형성하는 공정, 상기 구도회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층을 포함한 기판 전면에 게이트절연막을 형성하는 공정, 상기 게이트절연막상의 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층 상부에 각각 게이트전극을 형성하는 공정, 상기 게이트전극을 마스크로 하여 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층에 불순물이온을 주입하여 소오스 및 드레인영역을 형성하는 공정을 포함하는 것을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법을 제공한다.The present invention provides a process of depositing amorphous silicon by thermochemical vapor deposition on a transparent insulating substrate including a driving circuit region and a pixel region, and patterning the amorphous silicon layer to form an active layer pattern of a thin film transistor and a thin film transistor of a pixel circuit. Forming an active layer pattern, selectively crystallizing an active layer pattern of the thin film transistor by laser annealing, hydrogenating the active layer pattern of the thin film transistor of the driving circuit unit and the active layer pattern of the pixel thin film transistor of the thin film transistor of the driving circuit thin film transistor Forming a polysilicon active layer and an amorphous silicon hydride active layer of the pixel portion thin film transistor, forming a gate insulating film on the entire surface of the substrate including the composition circuit portion thin film transistor active layer and the pixel portion thin film transistor active layer, the gate Forming a gate electrode on the thin film transistor active layer and the pixel portion thin film transistor active layer on the smoke film, and implanting impurity ions into the thin film transistor active layer and the pixel thin film transistor active layer using the gate electrode as a mask. And it provides a thin film transistor manufacturing method for a liquid crystal display device comprising the step of forming a drain region.

Description

액정표시소자용 박막트랜지스터 제조방법Manufacturing method of thin film transistor for liquid crystal display device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 액정표시소자용 박막트랜지스터의 제조방법을 도시한 공정순서도.2 is a process flowchart showing a method of manufacturing a thin film transistor for a liquid crystal display device according to the present invention.

Claims (3)

구동회로부 영역 및 화소부 영역을 포함하는 투명절연기판위에 열화학기상증착법에 의해 비정질실리콘을 증착하는 공정과, 상기 비정질실리콘층을 패터닝하여 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 형성하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴을 레이저어닐링에 의해 선택적으로 결정화하는 공정, 상기 구동회로부 박막트랜지스터의 활성층패턴 및 화소부 박막트랜지스터의 활성층패턴을 수소화하여 구동회로부 박막트랜지스터의 다결정실리콘 활성층 및 화소부 박막트랜지스터의 비정질수소화실리콘 활성층을 형성하는 공정, 상기 구도회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층을 포함한 기판 전면에 게이트절연막을 형성하는 공정, 상기 게이트절연막상의 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층 상부에 각각 게이트전극을 형성하는 공정, 상기 게이트전극을 마스크로 하여 상기 구동회로부 박막트랜지스터 활성층 및 화소부 박막트랜지스터 활성층에 불순물이온을 주입하여 소오스 및 드레인영역을 형성하는 공정을 포함하는 것을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법.Depositing amorphous silicon on the transparent insulating substrate including the driving circuit portion region and the pixel portion region by thermochemical vapor deposition, and patterning the amorphous silicon layer to form an active layer pattern of the driving circuit portion thin film transistor and an active layer pattern of the pixel portion thin film transistor. Forming crystals, selectively crystallizing the active layer patterns of the thin film transistors by laser annealing, hydrogenating the active layer patterns of the thin film transistors and the active layer patterns of the pixel thin film transistors by hydrogen annealing the polysilicon active layer of the thin film transistors And forming an amorphous silicon hydride active layer of the pixel portion thin film transistor, forming a gate insulating film on an entire surface of the substrate including the composition circuit portion thin film transistor active layer and the pixel portion thin film transistor active layer. Forming a gate electrode on the thin film transistor active layer and the pixel thin film transistor active layer, respectively, and impurity ions are injected into the thin film transistor active layer and the pixel thin film transistor active layer by using the gate electrode as a mask. A thin film transistor manufacturing method for a liquid crystal display device comprising the step of forming a region. 제1항에 있어서, 상기 열화학기상증착법에 의해 형성되는 비정질실리콘막의 수소함량은 1-5atom%이하이고, 표면거칠기는 20Å이하임을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법.The method of claim 1, wherein the hydrogen content of the amorphous silicon film formed by the thermochemical vapor deposition method is 1-5 atom% or less, and the surface roughness is 20 kW or less. 제1항에 있어서, 상기 소오스 및 드레인영역을 형성하는 공정후에 상기 게이트절연막상에 층간절연막을 형성하는 공정과, 상기 층간절연막 및 게이트절연막을 선택적으로 식각하여 상기 소오스 및 드레인영역을 노출시키는 콘택홀을 형성하는 공정, 상기 층간절연막상에 상기 콘택홀을 통해 상기 소오스 및 드레인영역과 접속되는 소오스 및 드레인 금속전극을 형성하는 공정이 더 포함되는 것을 특징으로 하는 액정표시소자용 박막트랜지스터 제조방법.2. The method of claim 1, further comprising: forming an interlayer insulating film on the gate insulating film after forming the source and drain regions, and selectively etching the interlayer insulating film and the gate insulating film to expose the source and drain regions. And forming a source and drain metal electrode connected to the source and drain regions through the contact hole on the interlayer insulating layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940005868A 1994-03-23 1994-03-23 Method for fabricating lcd-tft KR0166910B1 (en)

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KR1019940005868A KR0166910B1 (en) 1994-03-23 1994-03-23 Method for fabricating lcd-tft

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Application Number Priority Date Filing Date Title
KR1019940005868A KR0166910B1 (en) 1994-03-23 1994-03-23 Method for fabricating lcd-tft

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KR950028011A true KR950028011A (en) 1995-10-18
KR0166910B1 KR0166910B1 (en) 1999-02-01

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200119119A (en) * 2019-04-09 2020-10-19 한양대학교 산학협력단 Display device having hydrogen diffusion barrier layer and method of fabricating of the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200119119A (en) * 2019-04-09 2020-10-19 한양대학교 산학협력단 Display device having hydrogen diffusion barrier layer and method of fabricating of the same

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