KR950021936U - 동적메모리 디코더 회로 - Google Patents
동적메모리 디코더 회로Info
- Publication number
- KR950021936U KR950021936U KR2019930028885U KR930028885U KR950021936U KR 950021936 U KR950021936 U KR 950021936U KR 2019930028885 U KR2019930028885 U KR 2019930028885U KR 930028885 U KR930028885 U KR 930028885U KR 950021936 U KR950021936 U KR 950021936U
- Authority
- KR
- South Korea
- Prior art keywords
- decoder circuit
- dynamic memory
- memory decoder
- dynamic
- circuit
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q1/00—Details of selecting apparatus or arrangements
- H04Q1/18—Electrical details
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q2213/00—Indexing scheme relating to selecting arrangements in general and for multiplex systems
- H04Q2213/13103—Memory
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930028885U KR0116915Y1 (ko) | 1993-12-21 | 1993-12-21 | 동적메모리 디코더 회로 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019930028885U KR0116915Y1 (ko) | 1993-12-21 | 1993-12-21 | 동적메모리 디코더 회로 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950021936U true KR950021936U (ko) | 1995-07-28 |
KR0116915Y1 KR0116915Y1 (ko) | 1998-06-01 |
Family
ID=19371967
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019930028885U KR0116915Y1 (ko) | 1993-12-21 | 1993-12-21 | 동적메모리 디코더 회로 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0116915Y1 (ko) |
-
1993
- 1993-12-21 KR KR2019930028885U patent/KR0116915Y1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0116915Y1 (ko) | 1998-06-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR960012008A (ko) | 다이나믹형 메모리 | |
DE69525421D1 (de) | Integrierte Speicherschaltungsanordnung | |
DE69317944D1 (de) | Integrierte Speicherschaltung | |
DE69427339D1 (de) | Begrenzungsschaltung | |
DE69422453D1 (de) | Doppelzugriffspeicher | |
DE69400402D1 (de) | Integrierte Speicherschaltung mit verbesserter Lesezeit | |
DE69417077D1 (de) | Festwertspeicher | |
DE69409146D1 (de) | Dynamischer Direktzugriffhalbleiterspeicher | |
DE69701252D1 (de) | Speicherleseschaltung | |
KR950021936U (ko) | 동적메모리 디코더 회로 | |
DE69418401D1 (de) | Speicherleseverstärker | |
FI93401B (fi) | Saattomuistin asennusalusta | |
KR940017362U (ko) | 메모리 디코더 회로 | |
KR950007068U (ko) | 메모리 어드레스 디코딩회로 | |
DE69714350D1 (de) | Gemeinsam geteilte Bootstrapschaltung | |
KR950012369U (ko) | 메모리선택회로 | |
KR950020609U (ko) | 메모리 선택회로 | |
GB9710145D0 (en) | Dynamic memory integrated circuit structure | |
KR940023434U (ko) | 디램 리프레쉬 회로 | |
KR960024980U (ko) | 동적메모리 억세스 제어 회로 | |
KR940018375U (ko) | 다이나믹 포커스 회로 | |
KR950007544U (ko) | 다이나믹 포커스 회로 | |
KR960026069U (ko) | 수평 다이나믹 포커스 회로 | |
KR960002947U (ko) | 메모리의 컬럼선택 디코딩회로 | |
KR950020607U (ko) | 메모리 뱅킹 회로 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
N231 | Notification of change of applicant | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20041227 Year of fee payment: 8 |
|
LAPS | Lapse due to unpaid annual fee |