KR950021801A - Optical logic element (SEED) and its manufacturing method - Google Patents

Abstract

The present invention is directed to the creation of an optical logic device capable of realizing optical bistable to the extent practical in an optical system without an external applied voltage.

This was achieved by combining the low field electroabsoption characteristics of the shallow multi-quantum wells (SMQW) made of mixed semiconductors with the asymmetric Fabry Perot (ASFP) resonance structure.

The PIN diode SEED composed of ASFP resonance structure was focused on the fact that the thickness of the intrinsic region composed of multi-quantum wells, which are light absorbing layers, can be greatly reduced than the general SEED structure.

This assumes a constant built in potential, so that the difference in the electric field present in each SEED when the applied voltage VAP = 0 in the SMQW ASFP S-SEED circuit is equal to each SEED in a typical SMQW S-SEED circuit. This means that the difference is greater than the electric field present.

In other words, the difference in light absorption of each SEED element is increased, and the difference in reflectance and width of light bistable are increased.

Appropriate device design according to the present invention can allow two diode electric field difference of self-biased SMQW ASFP S-SEED (VAP = D) to be about two diode electric field difference when operating voltage VAP = 5Volt of typical SMQW S-SEED. .

Description

Optical logic element (SEED) and its manufacturing method

Since this is an open matter, no full text was included.

4 is a view showing the structure of a SEED according to a preferred embodiment of the present invention.

Claims (7)

In the SEED (Self Electro-optic Effective Device) optical logic device; A semi-insulating GaAs substrate 1; A first [lambda] / 4n reflection layer (where [lambda] is the wavelength of light) 2, which is grown on the substrate 1 to a predetermined thickness and has a predetermined refractive index n, and on the first reflective layer 2 A lower mirror layer 10 formed of a second reflective layer having a refractive index different from that of the first reflective layer 2 and having a refractive index different from that of the first reflective layer 2, repeatedly formed at predetermined intervals; A cathode contact layer (4) grown on the lower mirror layer (10) to a thickness of about 500 nm of N ⁺ type; A first buffer layer (5) grown on the cathode contact layer (4) with a thickness of about 20 nm; On the first buffer layer 5, a shallow multi-quantum well layer in which a shallow quantum well layer composed of a barrier layer 6 about 6 nm thick and a well layer 7 about 10 nm thick is multiply grown at a predetermined period. (11); A second buffer layer 8 grown on the shallow multi-quantum well layer 11 to a thickness of about 20 nm; And an anode contact layer (9) grown on the second buffer layer (8) to a thickness of about 506.7 nm. The optical logic element according to claim 1, wherein the refractive index of the first reflective layer (2) is relatively smaller than the refractive index of the second reflective layer (3). 3. The method of claim 2, wherein the first and second reflecting layers (2,3) are each made of AlAs and Al _0.1 Ga _0.9 As, and the first and second reflecting layers (2,3) are each about 72.1 nm and 60.7. An optical logic device having a thickness of about nm, wherein the cathode contact layer 4 and the first circularly insulating layer 5 are made of N ⁺ Al _0.1 Ga _0.9 As and undoped Al _0.1 Ga _0.9 As. . The optical logic device of claim 3, wherein the lower mirror layer (10) is formed by repeatedly forming the first reflective layer (2) and the second reflective layer (3) for at least 12 cycles. 5. The barrier layer (6) and the well layer (7) are repeatedly formed in 36 cycles, and the barrier layer (6) and the well layer (7) are each made of Al _0.04 Ga _0.96 As and GaAs. Optical logic device, characterized in that made. 6. The optical logic device according to claim 5, wherein the second buffer layer (8) and the anode contact layer (9) consist of undoped Al _0.1 Ga _0.9 As and P ⁺ type Al _0.1 Ga _0.9 As, respectively. . In the method of manufacturing a SEED (Self Electro-optic Effective Device) optical logic element, a first λ / 4n reflective layer made of AlAs having a predetermined refractive index n on a semi-insulated GaAs substrate 1 (where λ is The wavelength of light) 2 is grown to a thickness of about 72.1 nm, and a second λ / 4n reflective layer 3 made of Al _0.1 Ga _0.9 As having a relatively high refractive index is grown to a thickness of about 60.7 nm. Forming a lower mirror layer (10) by forming at least 12 cycles of the lambda / 4n reflection layer (2) and the second lambda / 4n reflection layer (3); Forming a cathode contact layer (4) by growing N ⁺ type Al _0.1 Ga _0.9 As on the lower mirror layer (10) to a thickness of about 500 nm; Forming a first buffer layer (5) by growing non-doped Al _0.1 Ga _0.9 As on the cathode contact layer (4) to a thickness of about 20 nm; 10 nm of Al _0.04 Ga _0.96 As layer 6 on the first buffer layer 5 having a thickness of about 6 nm as a barrier layer. Growing a GaAs layer (7) having a thickness of approximately one order, and growing the barrier layer (6) and the well layer (7) in 36 cycles to form a shallow multi-quantum well layer (SMQW) (11); Forming a second buffer layer (8) by growing Al _0.1 Ga _0.9 As undoped with a thickness of about 20 nm on the shallow multi-quantum well layer (11); Production method of the second is characterized by an optical logic element comprising a step of forming a buffer layer (8) Al _0.1 Ga _0.9 As grown to anode contact layer 9 of the P ⁺ type to a thickness to just above the 506.7㎚ . ※ Note: The disclosure is based on the initial application.