KR950016214A - Shared address control device of VGA and VTR - Google Patents

Shared address control device of VGA and VTR Download PDF

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Publication number
KR950016214A
KR950016214A KR1019930025190A KR930025190A KR950016214A KR 950016214 A KR950016214 A KR 950016214A KR 1019930025190 A KR1019930025190 A KR 1019930025190A KR 930025190 A KR930025190 A KR 930025190A KR 950016214 A KR950016214 A KR 950016214A
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KR
South Korea
Prior art keywords
vga
vtr
data
flop
flip
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Application number
KR1019930025190A
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Korean (ko)
Inventor
차균오
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이헌조
엘지전자 주식회사
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Priority to KR1019930025190A priority Critical patent/KR950016214A/en
Publication of KR950016214A publication Critical patent/KR950016214A/en

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Abstract

본 발명은 VGA와 VTR의 화상을 모니터에 디스플레이하기 위해 VGA메모리와 VTR메모리를 각각 별개로 구비한 것을 1개의 메모리만을 이용하여 VGA메모리와 VTR메모리를 공용화하도록 한 브이지에이(VGA)와 비디오(VTR)의 공유어드레스 제어장치에 관한 것으로, 종래 VGA와 VTR의 어드레스 제어장치는 VGA와 VTR의 화상을 모니터(6)에 디스플레이하기 위해서는 VGA메모리(1)와 VTR메모리(3)를 각각 별개로 구비해야 하므로서 원가가 상승하고 PCB의 공간이 커지는 문제점이 있었다.According to the present invention, a VGA and a VTR memory are used to share a VGA memory and a VTR memory by using only one memory to display VGA and VTR images on a monitor. The address control device of the conventional VGA and VTR has to be provided separately from the VGA memory (1) and the VTR memory (3) in order to display the VGA and VTR image on the monitor (6). As a result, the cost has risen and the space of the PCB has become large.

본 발명은 이와같은 종래 문제점을 해결하기 위하여 VGA데이타와 VTR데이타를 저장하는 메모리 1개를 사용하여 입력된 VGA데이타 및 VTR데이타가 스위칭 선택되도록 셀렉터 신호를 출력하여 멀티플렉서부(14)를 제어하는 데이타 스위칭부(16)를 통해 VGA메모리와 VTR메모리를 공용화하도록 한 것으로 VGA와 VTR의 공유어드레스 제어장치에 적용한다.In order to solve the conventional problem, the present invention controls the multiplexer unit 14 by outputting a selector signal so that the input VGA data and the VTR data are switched by using one memory for storing the VGA data and the VTR data. The VGA 16 and the VTR memory are made common through the switching unit 16 and applied to the shared address control device of the VGA and the VTR.

Description

브이지에이(VGA)와 비디오(VTR)의 공유어드레스 제어장치Shared address control device of VGA and VTR

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 VGA와 VTR의 어드레스 제어장치 블록도,1 is a block diagram of an address controller of VGA and VTR,

제2도는 본 발명의 VGA와 VTR의 공유어드레스 제어장치 블록도.2 is a block diagram of a shared address control device for VGA and VTR of the present invention.

Claims (2)

입력된 VGA데이타와 VTR데이타를 저장하는 공유메모리부(11)와, 공유메모리부(11)에 저장된 VGA데이타를 리드/라이트하는 VGA제어부(12)와, VTR데이타를 리드/라이트하는 VTR제어부(13)와, 입력된 셀렉터 신호에 의해 VGA데이타 및 VTR데이타를 스위칭 선택하여 모니터(15)에 디스플레이하는 멀티플렉서부(14)와, 입력된 VGA데이타 및 VTR데이타가 스위칭 선택되도록 셀렉터 신호를 출력하여 멀티플렉서부(14)를 제어하는 데이타 스위칭부(16)로 구성된 브이지에이(VGA)와 비디오(VTR)의 공유어드레스 제어장치.A shared memory section 11 for storing input VGA data and VTR data, a VGA controller 12 for reading / writing VGA data stored in the shared memory section 11, and a VTR controller for reading / writing VTR data ( 13), a multiplexer section 14 for switching and selecting VGA data and VTR data based on the input selector signal and displaying the same on the monitor 15, and outputting a selector signal so that the input VGA data and VTR data are switched and multiplexed. A shared address control device for a VGA and a video (VTR) comprising a data switching section (16) for controlling a section (14). 제1항에 있어서, 데이타 스위칭부(16)는, 확정된 윈도의 크기 및 위치에 해당하는 Start-x 어드레스를 비교하는 Start-x 비교부(17)와, 확정된 윈도우의 크기 및 위치에 해당하는 End-x 어드레스를 비교하는 End-x 비교부(18)와, 확정된 윈도의 크기 및 위치에 해당하는 Start-y 어드레스를 비교하는 Start-y 비교부(19)와 확정된 윈도우의 크기 및 위치에 해당하는 End-y 어드레스를 비교하는 End-y 비교부(20)와, 상기 End-x 비교부(18)에서 출력된 비교신호와 리세트 신호를 논리곱하여 제1D플립플롭(23)을 리세트시키는 제1NAD게이트(21)와, End-y 비교부(20)에서 출력된 비교신호와 리세트 신호를 논리곱하여 제2D플립플롭(24)을 리세트시키는 제2NAD게이트(22)와, 상기 Start-y 비교부(17) 및 End-x 비교부(18)에서 출력된 비교신호를 입력받아 VGA데이타 또는 VTR데이타 셀렉터 제어신호를 출력하는 제1D플립플롭(23)과, Start-y 비교부(19) 및 End-y 비교부(20)에서 출력된 비교신호를 입력받아 VGA데이타 또는 VTR데이타 셀렉터 제어신호를 출력하는 제2D플립플롭(24)과, 상기 제1D플립플롭(23)과 제2D플립플롭(24)에서 출력된 신호를 논리곱하여 멀티플렉서부(14)를 제어하는 제3AND게이트(25)로 구성된 브이지에이(VGA)와 비디오(VTR)의 공유어드레스 제어장치.2. The data switching unit 16 according to claim 1, wherein the data switching unit 16 corresponds to a start-x comparison unit 17 that compares a Start-x address corresponding to a determined size and position of a window, and a size and position of a fixed window. End-x comparing unit 18 for comparing the End-x address, and Start-y comparing unit 19 for comparing the Start-y address corresponding to the size and position of the determined window and the size of the fixed window and End-y comparison unit 20 for comparing the end-y address corresponding to the position, and the comparison signal and the reset signal output from the end-x comparison unit 18 and the first D flip-flop (23) A second NAD gate 22 for resetting the second D flip-flop 24 by performing a logical AND of the first NAD gate 21 to be reset, the comparison signal output from the end-y comparator 20, and the reset signal; It receives the comparison signal output from the start-y comparator 17 and the end-x comparator 18 and outputs a VGA data or a VTR data selector control signal. A second D flip-flop 23 that receives the comparison signals output from the first D flip-flop 23 and the start-y comparator 19 and the end-y comparator 20 and outputs a VGA data or a VTR data selector control signal. A VGA (VGA) including a third AND gate 25 configured to logically multiply the signals output from the first D flip-flop 23 and the second D flip-flop 24 to control the multiplexer unit 14; Shared address control device for video (VTR). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930025190A 1993-11-25 1993-11-25 Shared address control device of VGA and VTR KR950016214A (en)

Priority Applications (1)

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KR1019930025190A KR950016214A (en) 1993-11-25 1993-11-25 Shared address control device of VGA and VTR

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Application Number Priority Date Filing Date Title
KR1019930025190A KR950016214A (en) 1993-11-25 1993-11-25 Shared address control device of VGA and VTR

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KR950016214A true KR950016214A (en) 1995-06-17

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100765512B1 (en) * 2005-10-13 2007-10-10 엘지전자 주식회사 Apparatus of plasma display panel
KR100829757B1 (en) * 2007-03-05 2008-05-15 삼성에스디아이 주식회사 Plasma display panel driving device for controlling 2 kinds of drivers having different output channels

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100765512B1 (en) * 2005-10-13 2007-10-10 엘지전자 주식회사 Apparatus of plasma display panel
KR100829757B1 (en) * 2007-03-05 2008-05-15 삼성에스디아이 주식회사 Plasma display panel driving device for controlling 2 kinds of drivers having different output channels

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