KR950004395A - Method of forming fine pattern of semiconductor device - Google Patents

Method of forming fine pattern of semiconductor device Download PDF

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Publication number
KR950004395A
KR950004395A KR1019930013232A KR930013232A KR950004395A KR 950004395 A KR950004395 A KR 950004395A KR 1019930013232 A KR1019930013232 A KR 1019930013232A KR 930013232 A KR930013232 A KR 930013232A KR 950004395 A KR950004395 A KR 950004395A
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KR
South Korea
Prior art keywords
forming
semiconductor device
photoresist pattern
silicide
photoresist
Prior art date
Application number
KR1019930013232A
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Korean (ko)
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KR960000186B1 (en
Inventor
김명선
Original Assignee
김주용
현대전자산업 주식회사
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Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019930013232A priority Critical patent/KR960000186B1/en
Publication of KR950004395A publication Critical patent/KR950004395A/en
Application granted granted Critical
Publication of KR960000186B1 publication Critical patent/KR960000186B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

본 발명은 실리레이션용 시약의 부피 팽창을 이용한 실리레이션 공정을 실시하여 감광막 패턴간의 간격을 줄임으로써, 노광 기술의 향상없이 미세 선폭의 감광막 패턴을 형성하는 반도체 소자의 미세패턴 형성방법에 관한 기술이다.The present invention relates to a method of forming a micropattern of a semiconductor device for forming a photoresist pattern having a fine line width without improving the exposure technique by performing a silicide process using volume expansion of the reagent for silicide to reduce the interval between the photoresist patterns. .

Description

반도체 소자의 미세패턴 형성방법Method of forming fine pattern of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1 도 내지 제 3 도는 본 발명의 미세패턴 형성방법을 도시한 단면도.1 to 3 are cross-sectional views showing a method for forming a micropattern of the present invention.

Claims (5)

반도체 소자의 미세패턴 형성방법에 있어서, 식각하고자 하는 물질을 실리콘 웨이퍼(Silicon Wafer)전면에 증착한 후, 그상부 표면에 감광막(Photo Resist)을 도포하고, 마스크를 이용하여 감광막을 선택적으로 노광, 현상하여 감광막 패턴을형성하는 단계와, 실리레이션 오븐(Silylation Oven)에서 감광막 패턴의 전체 측벽과 상부 표면에 실리레이션용 시약을이용한 실리레이션 공정을 실시함에 따라, 실리레이션용 시약의 성분이 감광막 패턴 내부로 확산되어 감광막 패턴의 전체측벽과 상부 표면의 부피를 팽창시킴으로써, 감광막 패턴간의 간격이 좁아진 미세패턴을 형성하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 미세패턴 형성방법.In the method of forming a fine pattern of a semiconductor device, a material to be etched is deposited on the entire surface of a silicon wafer, and then a photoresist is applied to the upper surface thereof, and the photoresist is selectively exposed using a mask. Developing to form a photoresist pattern, and performing a silicide process using a silicide reagent on all sidewalls and upper surfaces of the photoresist pattern in a silencing oven, whereby the components of the silicide reagent form a photoresist pattern. A method of forming a micropattern of a semiconductor device, comprising: forming a micropattern having a small gap between the photoresist pattern by diffusing to expand the volume of the entire sidewall and the upper surface of the photoresist pattern. 제1항에 있어서, 현상공정으로 감광막 패턴을 형성한 후에 120℃ 이상의 고온 공정을 거치지 않고 실리레이션 공정을 실시하는 것을 특징으로 하는 반도체 소자의 미세패턴 형성방법.The method of forming a micropattern of a semiconductor device according to claim 1, wherein after the photoresist pattern is formed by a developing step, a silicidation step is performed without undergoing a high temperature step of 120 ° C or higher. 제1항에 있어서, 실리레이션용 시약으로 HMDS(Hexa Methyl Di Silazane), TMDS, TMSDMA, DMSDMA, TMSDEA, Hepta MDS 중에서 하나를 사용하는 것을 특징으로 하는 반도체 소자의 미세패턴 형성방법.The method of claim 1, wherein one of HMDS (Hexa Methyl Di Silazane), TMDS, TMSDMA, DMSDMA, TMSDEA, and Hepta MDS is used as a reagent for silicide. 제1항에 있어서, 실리레이션 공정 후에 산소 플라즈마(O2Plasma) 처리를 함으로써 감광막 패턴 상부에 산화막을 형성시켜서, 식각될 하부층과 감광막 패턴 사이의 식각 선택비를 높이도록 하는 것을 특징으로 하는 반도체 소자의 미세패턴 형성방법.The semiconductor device of claim 1, wherein an oxide film is formed on the photoresist pattern by performing an oxygen plasma (O 2 plasma) treatment after the silicide process, thereby increasing an etching selectivity between the lower layer to be etched and the photoresist pattern. Method of forming a fine pattern. 제1항에 있어서, 미세패턴 형성방법을 콘택홀 형성시에 적용하는 것을 특징으로 하는 반도체 소자의 미세패턴 형상방법.The method of forming a fine pattern of a semiconductor device according to claim 1, wherein the method of forming a fine pattern is applied at the time of forming a contact hole. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930013232A 1993-07-14 1993-07-14 Fine pattern forming method of semiconductor device KR960000186B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930013232A KR960000186B1 (en) 1993-07-14 1993-07-14 Fine pattern forming method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930013232A KR960000186B1 (en) 1993-07-14 1993-07-14 Fine pattern forming method of semiconductor device

Publications (2)

Publication Number Publication Date
KR950004395A true KR950004395A (en) 1995-02-18
KR960000186B1 KR960000186B1 (en) 1996-01-03

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Application Number Title Priority Date Filing Date
KR1019930013232A KR960000186B1 (en) 1993-07-14 1993-07-14 Fine pattern forming method of semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100275661B1 (en) * 1997-12-30 2001-01-15 김영환 Method for photoresist pattern used silylation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100275661B1 (en) * 1997-12-30 2001-01-15 김영환 Method for photoresist pattern used silylation

Also Published As

Publication number Publication date
KR960000186B1 (en) 1996-01-03

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