KR950002385A - MULTI SYNC MONITOR ADAPTER CIRCUIT - Google Patents

MULTI SYNC MONITOR ADAPTER CIRCUIT Download PDF

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Publication number
KR950002385A
KR950002385A KR1019930011476A KR930011476A KR950002385A KR 950002385 A KR950002385 A KR 950002385A KR 1019930011476 A KR1019930011476 A KR 1019930011476A KR 930011476 A KR930011476 A KR 930011476A KR 950002385 A KR950002385 A KR 950002385A
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South Korea
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synchronous
trigger
terminal
generating circuit
gain
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KR1019930011476A
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KR0133962B1 (en
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이수원
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배순훈
대우전자 주식회사
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/06—Generation of synchronising signals

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronizing For Television (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

본 발명은 TV PCB자동조정기에 관한 것으로 특히 R.G.B(Red Green Blue) 신호와 수평ㆍ수직편향신호를 이용하여 컴퓨터용 다중동기모니터에서 TV화면을 볼 수 있도록 한 다중동기모니터의 어댑터회로에 관한 것으로, TV PCB어셈블리 테스트포인트(TP)점에서 추출된 신호를 입력코넥터(100)를 통해 R.G.B신호를 DC전압을 제거하고 적정게인(GAIN)으로 설정하여 버퍼링하는 RGB버퍼회로(300)를 거쳐 다중동기 모니터에 입력하는 출력코넥터(200) R.G.B단자에 접속하고, 입력코넥터(100)에서 출력되는 수평편향신호(HD)와 수직동기신호(VD)를 각각의 펄스폭 및 위치를 변경하여 최종동기신호를 출력하는 수평동기신호발생회로(400)와 수직동기신호발생회로(500)를 통해 복합동기신호로 바꾸는 복합동기신호발생회로(600)를 거쳐 출력코넥터(200) SYNC단자에 연결되게 구성한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TV PCB automatic regulator, and more particularly, to an adapter circuit of a multi-synchronous monitor for viewing a TV screen in a multi-synchronous monitor for a computer using an RGB (Red Green Blue) signal and a horizontal and vertical deflection signal. Multi-synchronous monitor via RGB buffer circuit 300 which buffers the signal extracted from TV PCB assembly test point (TP) by removing the DC voltage and setting the gain to GAIN via input connector 100 Connects to the RGB terminal of the output connector 200 input to the output connector, and outputs the final synchronization signal by changing the pulse width and the position of the horizontal deflection signal HD and the vertical synchronization signal VD output from the input connector 100, respectively. It is configured to be connected to the output connector 200, the SYNC terminal via the composite synchronous signal generating circuit 600 to convert the composite synchronous signal through the horizontal synchronous signal generating circuit 400 and the vertical synchronous signal generating circuit 500.

Description

다중동기(MULTI SYNC) 모니터 어댑터 회로MULTI SYNC MONITOR ADAPTER CIRCUIT

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 회로도, 제2도의 (가)도는 본 발명의 수평 편향신호처리 파형도, (나)도는 본 발명의 수직편향신호처리 파형도, (다)도는 최종동기신호 출력파형도.1 is a circuit diagram of the present invention, (a) is a horizontal deflection signal processing waveform diagram of the present invention, (b) is a vertical deflection signal processing waveform diagram of the present invention, (c) is a final synchronous signal output waveform diagram.

Claims (5)

TV, PCB자동조정기에 있어서, TV PCB어셈블리 테스트포인트(TP)점에서 추출된 신호를 입력코넥터(100)를 통해 R.G.B신호를 DC전압을 제거하고 적정게인(GAIN)으로 설정하여 버퍼링하는 RGB버퍼회로(300)를 거쳐 다중동기모니터에 입력하는 출력코넥터(200) R.G.B단자에 접속하고, 입력코넥터(100)에서 출력되는 수평편향신호(HD)와 수직동기신호(VD)를 각각의 펄스폭 및 위치를 변경하여 최종동기신호를 출력하는 수평동기신호발생회로(400)와 수직동기신호발생회로(500)를 통해 복합동기신호로 바꾸는 복합동기신호발생회로(600)를 거쳐 출력코넥터(200) SYNC단자에 연결되게 구성한 것을 특징으로 하는 다중동기 모니터의 어댑터 회로.In the TV and PCB automatic controller, the RGB buffer circuit that buffers the signal extracted from the TV PCB assembly test point (TP) point by removing the DC voltage from the input connector 100 and setting it to the proper gain (GAIN). Connect to the RGB connector of the output connector 200 which is inputted to the multi-synchronous monitor via the 300, and the pulse width and the position of the horizontal deflection signal HD and the vertical synchronization signal VD output from the input connector 100, respectively. The SYNC terminal of the output connector 200 through the composite synchronous signal generating circuit 600 which converts the composite synchronous signal through the horizontal synchronous signal generating circuit 400 and the vertical synchronous signal generating circuit 500 to output the final synchronous signal. Adapter circuit of a multi-synchronous monitor, characterized in that configured to be connected to. 제1항에 있어서, 상기 RGB버퍼회로(100)는 각각의 DC성분을 제거하는 콘덴서(C1-C3)와 적정게인(GAIN)으로 조정하는 가변저항(VR1-VR3)과 버퍼링하는 버퍼(OP1-OP3)로 구성한 것을 특징으로 하는 다중동기모니터의 어댑터회로.The method of claim 1, wherein the RGB buffer circuit 100 is buffered with a capacitor (C 1 -C 3 ) to remove each DC component and a variable resistor (VR 1- VR 3 ) adjusted to the appropriate gain (GAIN) Adapter circuit of a multi-synchronous monitor characterized in that the buffer (OP 1 to OP 3 ). 제1항에 있어서, 상기 수평동기신호발생회로(400)는 적정게인(GAIN)을 설정하는 가변저항(VR4)과 잡음을 제거하는 콘덴서(C4)를 온/오프에 의해 펄스( )를 발생하는 트랜지스터(TR2) 베이스에 접속하고 이의 콜렉터를 트리거IC(410) 5번단자에 연결하고 상기 트리거IC(410) 1,2번 단자에 펄스위치를 보정하는 콘덴서(C5)와 저항(R3) 가변저항(VR5)을 접속하고, 트리거IC(410) Q단자를 트리거IC(420) 5번단자에 연결하되 이의 1,2번단자에 펄스위치를 보정하는 콘덴서(C6)와 저항(R4) 가변저항(VR6)을 접속하고, 상기 트랜지스터(TR2) 에미터를 트리거IC(410)(420) 4번 단자에 연결하여 수평동기신호발생회로(400)를 구성하여 수평 동기신호를 보정하는 것을 특징으로 하는 다중동기모니터의 어댑터 회로.The horizontal synchronous signal generating circuit 400 is configured to turn on / off a pulse () by turning on / off a variable resistor (VR 4 ) for setting a proper gain (GAIN) and a capacitor (C 4 ) for removing noise. A capacitor (C 5 ) and a resistor (C 5 ) connected to the base of the generated transistor (TR 2 ), the collector of which is connected to terminal 5 of the trigger IC 410, and the pulse position is corrected to terminals 1 and 2 of the trigger IC R 3 ) Connect the variable resistor (VR 5 ), and connect the trigger IC (410) Q terminal to the trigger IC (420) terminal 5, and the capacitor (C 6 ) and to correct the pulse position of the terminals 1 and 2 and The resistor R 4 is connected to the variable resistor VR 6 , and the transistor TR 2 emitter is connected to the trigger IC 410 and 420 terminal 4 to form a horizontal synchronous signal generator 400. Adapter circuit of a multi-synchronous monitor, characterized in that for correcting the synchronization signal. 제1항에 있어서, 상기 수직동기신호발생회로(500)는 적정게인을 설정하는 가변저항(VR8)과 잡음을 제거하는 콘덴서(C8)를 온/오프에 의해 펄스( )를 발생하는 트랜지스터(TR1) 베이스에 접속하고, 이의 콜렉터를 트리거IC(510) 11번 단자에 연결하고, 상기 트리거IC(510) 14,15번 단자에 펄스위치를 보정하는 콘덴서(C9)와 저항(C7) 가변저항(VR9)을 접속하고, 트리거IC(510)단자를 트리거IC(520) 11번 단자에 연결하되, 이의 14,15번 단자에 펄스위치를 보정하는 콘덴서(C10)와 저항(R8) 가변저항(VR10)을 접속하고, 상기 트랜지스터(TR2) 에미터를 트리거IC(510)(520) 12번 단자에 연결하여 수직동기신호발생회로(500)를 구성하여 수직 동기신호를 보정하는 것을 특징으로 하는 다중동기모니터의 어댑터회로.The transistor of claim 1, wherein the vertical synchronous signal generating circuit 500 generates a pulse () by turning on / off a variable resistor (VR 8 ) for setting an appropriate gain and a capacitor (C 8 ) for removing noise. (TR 1 ) A capacitor (C 9 ) and a resistor (C 9 ) for connecting the base, connecting its collector to the trigger IC (510) terminal 11, and correcting the pulse position to the trigger IC (510) terminals 14 and 15. 7 ) Connect the variable resistor (VR 9 ) and trigger IC (510) The terminal is connected to the 11th terminal of the trigger IC 520, and the capacitor C 10 and the resistance R 8 variable resistor VR 10 for correcting the pulse position are connected to the 14 and 15 terminals thereof, and the transistor ( TR 2 ) Adapter circuit of the multi-synchronous monitor characterized in that the vertical synchronization signal generating circuit 500 to correct the vertical synchronization signal by connecting the emitter to the trigger IC (510) (520) terminal 12. 제1항에 있어서, 상기 복합동기신호발생회로(600)는 최종출력된 펄스신호를 앤드하는 앤드게이트(610)(620)와 오아게이트(630)와 DC성분을 차단하는 콘덴서(C7)와 적정게인을 조정하는 가변저항(VR7)과 버퍼링하는 버퍼(OP4)로 구성한 것을 특징으로 하는 다중동기모니터의 어댑터회로.The condenser C 7 of claim 1, wherein the complex synchronous signal generating circuit 600 includes an AND gate 610, 620, an oA gate 630, and a DC component for blocking a DC component. Adapter circuit of a multi-synchronous monitor characterized in that the variable resistor (VR 7 ) for adjusting the appropriate gain and the buffer (OP 4 ) for buffering. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930011476A 1993-06-23 1993-06-23 MULTI SYNC MONITOR ADAPTER CIRCUIT Expired - Fee Related KR0133962B1 (en)

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KR1019930011476A KR0133962B1 (en) 1993-06-23 1993-06-23 MULTI SYNC MONITOR ADAPTER CIRCUIT

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KR1019930011476A KR0133962B1 (en) 1993-06-23 1993-06-23 MULTI SYNC MONITOR ADAPTER CIRCUIT

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023055207A1 (en) * 2021-10-01 2023-04-06 주식회사 엘지화학 Thermoplastic resin composition
WO2023055206A1 (en) * 2021-10-01 2023-04-06 주식회사 엘지화학 Multi-block copolymer, resin composition comprising same, and method for preparing same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH714282B1 (en) * 2000-07-06 2019-04-30 Murata Machinery Ltd Storage system with conveyor elements.

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023055207A1 (en) * 2021-10-01 2023-04-06 주식회사 엘지화학 Thermoplastic resin composition
WO2023055206A1 (en) * 2021-10-01 2023-04-06 주식회사 엘지화학 Multi-block copolymer, resin composition comprising same, and method for preparing same

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