KR950002385A - MULTI SYNC MONITOR ADAPTER CIRCUIT - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TV PCB automatic regulator, and more particularly, to an adapter circuit of a multi-synchronous monitor for viewing a TV screen in a multi-synchronous monitor for a computer using an RGB (Red Green Blue) signal and a horizontal and vertical deflection signal. Multi-synchronous monitor via RGB buffer circuit 300 which buffers the signal extracted from TV PCB assembly test point (TP) by removing the DC voltage and setting the gain to GAIN via input connector 100 Connects to the RGB terminal of the output connector 200 input to the output connector, and outputs the final synchronization signal by changing the pulse width and the position of the horizontal deflection signal HD and the vertical synchronization signal VD output from the input connector 100, respectively. It is configured to be connected to the output connector 200, the SYNC terminal via the composite synchronous signal generating circuit 600 to convert the composite synchronous signal through the horizontal synchronous signal generating circuit 400 and the vertical synchronous signal generating circuit 500.

Description

MULTI SYNC MONITOR ADAPTER CIRCUIT

Since this is an open matter, no full text was included.

1 is a circuit diagram of the present invention, (a) is a horizontal deflection signal processing waveform diagram of the present invention, (b) is a vertical deflection signal processing waveform diagram of the present invention, (c) is a final synchronous signal output waveform diagram.

Claims (5)

In the TV and PCB automatic controller, the RGB buffer circuit that buffers the signal extracted from the TV PCB assembly test point (TP) point by removing the DC voltage from the input connector 100 and setting it to the proper gain (GAIN). Connect to the RGB connector of the output connector 200 which is inputted to the multi-synchronous monitor via the 300, and the pulse width and the position of the horizontal deflection signal HD and the vertical synchronization signal VD output from the input connector 100, respectively. The SYNC terminal of the output connector 200 through the composite synchronous signal generating circuit 600 which converts the composite synchronous signal through the horizontal synchronous signal generating circuit 400 and the vertical synchronous signal generating circuit 500 to output the final synchronous signal. Adapter circuit of a multi-synchronous monitor, characterized in that configured to be connected to. The method of claim 1, wherein the RGB buffer circuit 100 is buffered with a capacitor (C ₁ -C ₃ ) to remove each DC component and a variable resistor (VR _1- VR ₃ ) adjusted to the appropriate gain (GAIN) Adapter circuit of a multi-synchronous monitor characterized in that the buffer (OP _{1 to} OP ₃ ). The horizontal synchronous signal generating circuit 400 is configured to turn on / off a pulse () by turning on / off a variable resistor (VR ₄ ) for setting a proper gain (GAIN) and a capacitor (C ₄ ) for removing noise. A capacitor (C ₅ ) and a resistor (C ₅ ) connected to the base of the generated transistor (TR ₂ ), the collector of which is connected to terminal 5 of the trigger IC 410, and the pulse position is corrected to terminals 1 and 2 of the trigger IC R ₃ ) Connect the variable resistor (VR ₅ ), and connect the trigger IC (410) Q terminal to the trigger IC (420) terminal 5, and the capacitor (C ₆ ) and to correct the pulse position of the terminals 1 and 2 and The resistor R ₄ is connected to the variable resistor VR ₆ , and the transistor TR ₂ emitter is connected to the trigger IC 410 and 420 terminal 4 to form a horizontal synchronous signal generator 400. Adapter circuit of a multi-synchronous monitor, characterized in that for correcting the synchronization signal. The transistor of claim 1, wherein the vertical synchronous signal generating circuit 500 generates a pulse () by turning on / off a variable resistor (VR ₈ ) for setting an appropriate gain and a capacitor (C ₈ ) for removing noise. (TR ₁ ) A capacitor (C ₉ ) and a resistor (C ₉ ) for connecting the base, connecting its collector to the trigger IC (510) terminal 11, and correcting the pulse position to the trigger IC (510) terminals 14 and 15. ₇ ) Connect the variable resistor (VR ₉ ) and trigger IC (510) The terminal is connected to the 11th terminal of the trigger IC 520, and the capacitor C ₁₀ and the resistance R ₈ variable resistor VR ₁₀ for correcting the pulse position are connected to the 14 and 15 terminals thereof, and the transistor ( TR ₂ ) Adapter circuit of the multi-synchronous monitor characterized in that the vertical synchronization signal generating circuit 500 to correct the vertical synchronization signal by connecting the emitter to the trigger IC (510) (520) terminal 12. The condenser C ₇ of claim 1, wherein the complex synchronous signal generating circuit 600 includes an AND gate 610, 620, an oA gate 630, and a DC component for blocking a DC component. Adapter circuit of a multi-synchronous monitor characterized in that the variable resistor (VR ₇ ) for adjusting the appropriate gain and the buffer (OP ₄ ) for buffering. ※ Note: The disclosure is based on the initial application.