KR100386591B1 - Apparatus for correcting video signal of LCD Monitor - Google Patents

Abstract

The present invention relates to a video signal compensating device for an LCD monitor that enables to uniformly correct a level of an R / G / B signal transmitted from a PC in a brightness control mode. A first coupling unit for receiving and coupling an analog R / G / B signal whose signal level is changed in synchronization with a predetermined pulse output from the PC, and an analog coupled in the first coupling unit for receiving a predetermined horizontal synchronization signal. A clamp circuit portion for clamping a signal level corresponding to a predetermined section of the R / G / B signal to constantly correct the analog R / G / B signal level, and a constant level analog R / G / B signal corrected by the clamp circuit portion And a second coupling unit for coupling a signal and an analog / digital converter for receiving an analog R / G / B signal coupled from the second coupling unit and converting the analog R / G / B signal into a digital R / G / B signal. Open configuration, so by uniformly correct the R / G / B signal levels transmitted from the PC by the brightness control mode, and can display an image without shake on the screen, thereby improving the reliability of the product.

Description

Apparatus for correcting video signal of LCD Monitor

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitor, and more particularly, to an image signal correction apparatus of an LCD monitor.

Hereinafter, an image signal correction apparatus of an LCD monitor according to the prior art will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram illustrating the interconnection relationship between a general LCD monitor, a power adapter, and a PC. FIGS. 2A and 2B show current waveforms output from an inverter in the LCD monitor shown in FIG. 1, and FIG. 4A and 4B are diagrams illustrating signals applied to the analog / digital converter shown in FIG. 3.

As shown in FIG. 3, the image signal compensating apparatus of the LCD monitor according to the related art has an analog R / G signal level fluctuating due to a change in the level of pulses output from an inverter (not shown) in the LCD monitor in the brightness control mode. Receives a first capacitor (C ₁ ) for receiving and coupling a / B signal from a PC (not shown) and an analog R / G / B signal coupled by the first capacitor (C ₁ ) and receives a digital R signal. Analog-to-digital converter 10 for converting into a / G / B signal, a first resistor (R ₁ ) is connected to one end of the PC (not shown) and the other end is grounded, and the first resistor (R) ₁₎ one end being connected to the other side to the one end is connected to part of the first capacitor (second resistance (R ₂₎ and said second resistance (R ₂₎ and the first capacitor (C ₁₎ which is connected to C ₁₎ One end is connected to and the other end is configured to include a second capacitor (C ₂ ) is grounded.

Referring to the operation of the image signal correction apparatus of the LCD monitor according to the prior art configured as described above are as follows.

First, the first capacitor C ₁ receives and couples an analog R / G / B signal having a variable signal level transmitted from a PC and transmits the same to the analog / digital converter 10.

Herein, the analog R / G / B signals transmitted from the PC will be described with reference to FIG. 1 as follows.

First, an inverter (not shown) in the LCD monitor 1 outputs a PWM pulse to adjust the brightness of the fluorescent lamp (not shown) in the LCD monitor 1 and transmits it to the fluorescent lamp (not shown) in the brightness control mode. .

That is, the inverter (not shown) controls the brightness level of the fluorescent lamp (not shown) by varying the width of the PWM pulse to adjust the amount of current.

Here, the PWM pulse output from the inverter (not shown) in the brightness control mode, that is, the current waveform, is shown as shown in FIG. 2A, and the current output from the inverter (not shown) when the brightness control mode is not performed. The waveform appears as shown in FIG. 2B.

At this time, as shown in Figure 2a, the PWM pulse (i.e. current waveform) output from the inverter (not shown) in the brightness control mode is a portion with a signal (that is, when the current flows) and a portion without a signal ( That is, it can be seen that there is a sudden load change in the case that no current flows.

Subsequently, as shown in FIG. 1, since the frame ground terminal between the LCD monitor 1, the power adapter 2, and the PC 3 is all tied together, the LCD monitor 1 and the power adapter 2 are connected together. It can be seen that a current loop (Loop) is formed between the and the PC (3).

That is, the first current i ₁ output from the power adapter 2 to the LCD monitor 1 and the second current i ₂ output from the LCD monitor 1 to the power adapter ₂ are As described above, the LCD monitor 1 and the PC 3 are connected to each other because the frame ground terminal between the LCD monitor 1, the power adapter 2, and the PC 3 is tied together. Three currents i ₃ are generated to form a current loop consisting of the first current i ₁ , the second current i ₂ , and the third current i ₃ .

Here, when the inverter (not shown) in the LCD monitor 1 operates in the brightness control mode, the LCD monitor 1 and the LCD pulse may be changed due to a sudden load change of the PWM pulse output from the inverter (not shown). The level of the third current i ₃ applied to the PC 3 in which the frame ground terminal is bundled is varied.

The PC 3 transmits to the LCD monitor 1 an analog R / G / B signal that is shaken in synchronization with the PWM pulse due to the variation of the third current i ₃ .

Subsequently, as shown in FIG. 3, when an analog R / G / B signal having a shaking signal level is transmitted from the PC 3, the signal is transmitted to the first capacitor C ₁ via a second resistor R ₂ . .

The first capacitor C ₁ couples the analog R / G / B signals transmitted through the second resistor R ₂ to the analog / digital converter 10, and transmits the analog / digital converter 10. The digital converter 10 converts the analog R / G / B signal into a digital R / G / B signal.

Here, the analog R / G / B signal at point A coupled by the first capacitor C ₁ and input to the analog / digital converter 10 has a constant signal level as shown in FIG. 4A. Not.

That is, when the inverter (not shown) operates in the brightness control mode, the third current i ₃ applied to the PC 3 is changed due to a sudden load change of the corresponding PWM pulse, so that the PC 3 is The analog R / G / B signal, which is shaken in synchronization with the PWM pulse, is transmitted to the LCD monitor 1. As a result, the analog / digital converter 10 has an R signal whose signal level is not constant as shown in FIG. 4A. / G / B signal is received.

On the other hand, when the inverter (not shown) does not operate in the brightness control mode, that is, when the brightness is maximum, the PWM pulse output from the inverter (not shown) appears as shown in Figure 2b, so that the PC 3 is at a constant level. The analog R / G / B signal is transmitted to the LCD monitor 1, and the analog / digital converter 10 receives an analog R / G / B signal of a predetermined level as shown in FIG. 4B. do.

The image signal correcting apparatus of the LCD monitor according to the related art described above may display an image displayed on the screen due to a change in the level of the R / G / B signal transmitted from the PC to the LCD monitor when the inverter operates in the brightness control mode. There is a shaky problem.

Accordingly, the present invention has been made to solve the above problems, LCD clamping the level of the R / G / B signal transmitted from the PC in the brightness control mode so that the corresponding R / G / B signal level is constantly corrected It is an object of the present invention to provide a video signal correction device for a monitor.

1 is a block diagram showing the interconnection of a typical LCD monitor, power adapter and PC

2A and 2B are diagrams showing current waveforms output from an inverter in the LCD monitor shown in FIG.

3 is a circuit diagram showing an image signal correction apparatus of an LCD monitor according to the prior art;

4A and 4B illustrate signals applied to the analog / digital converter shown in FIG. 3.

5 is a circuit diagram showing an image signal correction apparatus of the LCD monitor according to the present invention;

FIG. 6 illustrates an input / output signal of an exclusive OR gate of the clamp circuit unit illustrated in FIG. 5.

FIG. 7 is a diagram illustrating a signal applied to an analog / digital converter shown in FIG. 5;

Explanation of symbols for main parts of the drawings

100: first coupling portion 200: clamp circuit portion

210: inverter gate 220: exclusive logical sum gate

300: second coupling unit 400: analog / digital conversion unit

R ₁₁₀ to R ₁₅₀ : first to fifth resistors Q ₁₁₀ : first transistor

C ₁₁₀ ~ C ₁₄₀ : first to fourth capacitor

In order to achieve the above object, an image signal correcting apparatus of an LCD monitor according to the present invention is an LCD monitor having an inverter, wherein the signal level is changed in synchronization with a predetermined pulse output from the inverter in the brightness control mode. A signal level corresponding to a predetermined section of an analog R / G / B signal coupled to the first coupling part that receives the G / B signal from the PC and couples it, and receives a predetermined horizontal synchronization signal and is coupled by the first coupling part. A clamp circuit portion for clamping and uniformly correcting the analog R / G / B signal level, a second coupling portion for coupling the analog R / G / B signal of a constant level corrected in the clamp circuit portion, and a second coupling portion It includes an analog / digital converter that receives the analog R / G / B signal coupled from and converts it into a digital R / G / B signal.

Hereinafter, an image signal correction apparatus of an LCD monitor according to the present invention will be described with reference to the accompanying drawings.

FIG. 5 is a circuit diagram illustrating an image signal correcting apparatus of an LCD monitor according to the present invention. FIG. 6 is a diagram illustrating an input / output signal of an exclusive OR gate of the clamp circuit unit shown in FIG. 5, and FIG. 7 is shown in FIG. 5. Is a diagram showing a signal applied to an analog / digital converter.

As shown in FIG. 5, the image signal correcting apparatus of the LCD monitor according to the present invention has a signal level in synchronization with a predetermined pulse output from the inverter (not shown) in the LCD monitor having an inverter. A first coupling unit 100 for receiving and coupling a variable analog R / G / B signal from a PC (not shown) and a predetermined horizontal synchronization signal and are coupled by the first coupling unit 100. The clamp circuit unit 200 for clamping the signal level corresponding to a predetermined section of the analog R / G / B signal to constantly correct the analog R / G / B signal level, and the constant corrected by the clamp circuit unit 200. A second coupling unit 300 for coupling an analog R / G / B signal of a level and an analog R / G / B signal coupled from the second coupling unit 300 are inputted, and the digital R / G / B signal is received. Analog-to-digital converter converts B signals And 400.

Here, the first coupling unit 100 has one end connected to an output terminal of the PC (not shown), and the other end connected to a first resistor R ₁₁₀ connected to the ground, and one end connected to the first resistor R ₁₁₀ . And a first capacitor C ₁₁₀ coupling the analog R / G / B signal transmitted from the PC (not shown).

In addition, the clamp circuit unit 200 receives the horizontal synchronous signal and converts the inverter gate 210 to inversely convert the inverted signal from the inverter gate 210 and the second resistor R ₁₂₀ and the second connected in parallel. a capacitor (C ₁₂₀₎ and a second resistor (R ₁₂₀₎ and a second capacitor receiving the integral signal from the (C ₁₂₀₎ an exclusive-OR for processing by the exclusive-OR with the inversion signal from the inverter gate 210 is connected to the parallel A first transistor Q ₁₁₀ having a gate 220, an output signal of the exclusive OR gate 220 as a base, a collector connected to the first coupling unit 100, and an emitter connected to a ground terminal; a third resistor (R ₁₃₀₎ and the third resistor (R ₁₃₀₎ and said second end connected to the output of the exclusive OR gate 220 and one end is connected to the base of the first transistor (Q ₁₁₀₎ 1 transition One end is connected to the connection portion of the emitter (Q ₁₁₀₎ and the other end is composed of a fourth resistor (R ₁₄₀₎ is grounded.

Subsequently, the second coupling part 300 includes a fifth resistor R ₁₅₀ having one end connected to the first coupling part 100 and one end connected to the other end of the fifth resistor R ₁₅₀ , and the other end thereof. One end is connected to the third capacitor (C ₁₃₀ ) and the fifth resistor (R ₁₅₀ ) and the third capacitor (C ₁₃₀ ) connected to the analog / digital converter 400, and the other end is Is composed of the fourth capacitor C ₁₄₀ grounded.

The operation of the image signal correction apparatus of the LCD monitor according to the present invention configured as described above is as follows.

First, as shown in FIG. 1, when the inverter (not shown) in the LCD monitor 1 operates in the brightness control mode, that is, due to a sudden load change of the PWM pulse output from the inverter (not shown), that is, the PWM The third current i ₃ shown in FIG. 1 fluctuates due to the large load change in the part with the signal and the part without the signal in the pulse.

As a result, the PC 3 shown in FIG. 1 changes the analog R / G / B signal whose signal level is changed in synchronization with the PWM pulse to the LCD monitor 1 due to the variation of the third current i ₃ . Will be sent.

Subsequently, as shown in FIG. 5, the first coupling unit 100 receives and couples an analog R / G / B signal having a variable signal level transmitted from the PC 3.

In this case, the clamp circuit 200 clamps the level variation of the analog R / G / B signal coupled from the first coupling unit 100 and corrects the analog R / G / B signal having a constant signal level.

That is, the inverter gate 210 of the clamp circuit unit 200 receives the horizontal synchronization signal and inversely converts the 'A' terminal of the exclusive OR gate 220 and the second resistor R ₁₂₀ and the second capacitor C connected in parallel. ₁₂₀ ).

Subsequently, the paralleled second resistor R ₁₂₀ and the second capacitor C ₁₂₀ integrate a signal output from the inverter gate 210 and transmit the integrated signal to the 'B' terminal of the exclusive OR gate 220.

The exclusive OR gate 220 processes the two signals input to the 'A' and 'B' terminals as an exclusive OR and outputs a predetermined signal.

Here, the signal input to the 'A' terminal of the exclusive OR gate 220 is shown as (a) shown in FIG. 6, and the signal input to the 'B' terminal is the second resistor R ₁₂₀ connected in parallel. And a signal integrated with the second capacitor C _{120 and} illustrated in FIG. 6B, and a signal processed and output as an exclusive OR by the exclusive OR gate 220 is illustrated in FIG. 6C. do.

Subsequently, the output signal of the exclusive OR gate 220 is divided by the third and fourth resistors R ₁₃₀ and R ₁₄₀ connected in parallel and transmitted to the base of the first transistor Q ₁₁₀ .

The first transistor Q ₁₁₀ receives a divided signal as a base through the third and fourth resistors R ₁₃₀ and R ₁₄₀ connected in parallel, and is turned on when the input signal is 'high'. The first coupling unit 100 discharges a signal corresponding to the blank period of the analog R / G / B signal coupled to the ground terminal, and if it is 'low', the signal is turned off so as not to discharge the analog R / G / B signal. .

As a result, a signal corresponding to the blank period of the analog R / G / B signal whose signal level is changed according to the operation of the first transistor Q ₁₁₀ of the clamp circuit unit 200, that is, the signal level is shaken, is grounded. By clamping a signal level that is discharged and shaken, it is corrected to an analog R / G / B / signal having a constant signal level.

Subsequently, an analog R / G / B signal having a predetermined level corrected by the clamp circuit unit 200 is transmitted to the second coupling unit 300, and the second coupling unit 300 has an analog R / G having the predetermined level. The G / B signal is coupled and transmitted to the analog / digital converter 400.

Here, it can be seen that the analog R / G / B signal at the point A ′ input to the analog / digital converter 400 is a signal having a predetermined level.

The analog / digital converter 400 receives an analog R / G / B signal having the predetermined signal level and converts the analog R / G / B signal into a digital R / G / B signal.

The video signal correcting apparatus of the LCD monitor according to the present invention as described above clamps the R / G / B signal level transmitted from the PC in the brightness control mode, thereby constantly correcting the corresponding R / G / B signal level. Image can be displayed without shaking, and this has the effect of improving the reliability of the product.

Claims (4)

In an LCD monitor with an inverter, A first coupling unit for receiving and coupling an analog R / G / B signal whose signal level varies in synchronization with a predetermined pulse output from the inverter in a brightness control mode; To correct the analog R / G / B signal level by receiving a predetermined horizontal synchronization signal and clamping a signal level corresponding to a predetermined section of the analog R / G / B signal coupled by the first coupling unit. Clamp circuit portion; A second coupling unit for coupling a constant level of analog R / G / B signals corrected by the clamp circuit unit; And, And an analog / digital converter configured to receive an analog R / G / B signal coupled by the second coupling unit and convert the analog R / G / B signal into a digital R / G / B signal. The method of claim 1, The first coupling part A first resistor having one end connected to an output terminal of the PC and the other end grounded; And a first capacitor having one end connected to the first resistor and coupling an analog R / G / B signal transmitted from the PC. The method of claim 1, The clamp circuit portion An inverter gate configured to receive the horizontal synchronization signal and perform reverse conversion; A second resistor and a second capacitor connected in parallel for integrating an inverted signal at the inverter gate; An exclusive OR gate for receiving an inverted signal from the inverter gate and an integrated signal from the second resistor and the second capacitor connected in parallel and processing the exclusive OR; A first transistor receiving an output signal of the exclusive OR gate as a base, a collector connected to the first coupling part, and an emitter connected to a ground terminal; A third resistor having one end connected to an output terminal of the exclusive OR gate and one end connected to a base of the first transistor; And a fourth resistor having one end connected to a connection portion of the third resistor and the first transistor and the other end grounded. The method of claim 1, The second coupling part A fifth resistor having one end connected to the first coupling part, A third capacitor having one end connected to the other end of the fifth resistor and the other end connected to the analog / digital converter; And a fourth capacitor having one end connected to a connection portion of the fifth resistor and the third capacitor and the other end grounded.