KR100194022B1 - Noise level adaptive vertical high capacity conversion circuit - Google Patents

Abstract

1. TECHNICAL FIELD OF THE INVENTION

The present invention is suitable for a noise level adaptive vertical high capacity conversion circuit of a video signal receiving processing apparatus.

2. The technical problem to be solved by the invention

The present invention provides a noise level adaptive vertical high capacity conversion circuit for adjusting the amount of vertical high frequency information according to the noise level to prevent image degradation due to noise mixing.

3. Summary of Solution to Invention

According to an embodiment of the present invention, a first ADC converter and a second ADC converter for AD converting a first input signal and a second input signal, respectively, in response to a digitized signal of the first input signal and the second input signal, In the noise level adaptive vertical high-capacity conversion circuit having a multiplexing section for selectively outputting a predetermined signal and a vertical stretching section vertically extending in response to the output signal of the multiplexing section, an input terminal is provided at an output terminal of the first LED conversion section. A delay adjuster for delaying the digitized first input signal for a predetermined time by an output terminal connected to an input terminal of the multiplexing unit, and an input terminal connected to an output terminal of the first LED converter, and perpendicular to the digitized first input signal. The noise level is adjusted in response to a sync voltage, a horizontal sync signal, a clock, and a threshold voltage signal of noise level. And a noise level detector for outputting and outputting the noise level detector and a noise level detector for controlling a predetermined amount of the second input signal in response to the digitized second input signal from the second ADC converter. A second input signal amount adjusting unit for outputting to the multiplexing unit, a timing connected to the multiplexing unit and the vertical stretching unit, respectively, and controlled by the vertical synchronizing signal, the horizontal synchronizing signal, and a clock to generate and output a predetermined timing signal; And a signal generator.

4. Important uses of the invention

The present invention is suitably used for a video signal receiving processing apparatus.

Description

Noise Level Adaptive Resin High Capacity Conversion Circuit

1 is a block diagram of a vertical high capacity conversion circuit according to the prior art.

2 is a block diagram of a vertical high capacity conversion circuit according to the present invention.

3 is a detailed block diagram of the second input signal amount adjusting unit of FIG. 2;

The present invention relates to a video signal receiving processing apparatus, and more particularly, to a noise level adaptive vertical high capacity conversion circuit for adaptively adjusting high frequency information of a video signal provided to a decoding unit in a high definition television receiver according to a noise level. will be.

In general, a high-definition television receiver such as an ED TV (Pt Extended TV), an Arm Plus (Pal Plus) TV, or the like has a vertical extension portion in the decoding portion as shown in FIG. 1 is a block diagram of a vertical high capacity conversion circuit according to the prior art. Referring to FIG. 1, the configuration includes a first AD converter 200 for converting digital data in response to a first input signal, for example, analog data (complex video signal), the first and second AD converters 100, An input terminal is connected to an output terminal of the 200, and a multiplexing unit 300 for multiplexing two digital data, and an output terminal and an input terminal of the melt multiplexing unit 300 are connected to each other and a vertical extension unit 400 for vertical extension of data. The analog composite video signal applied to the first input terminal IN1 inputting the first input signal is converted into digital data by the first AD converter 100 and then applied to the multiplexer 300. Meanwhile, the vertical high frequency information applied through the second input terminal IN2 for inputting the second input signal is digitally converted by the second AD converter and then applied to the multiplexer 300. The multiplexer 300 multiplexes the two input data and provides them to the vertical stretcher 400. Accordingly, the vertical stretcher 400 vertically stretches and outputs the multiplexed data. As described above, the vertical high frequency information and the composite video signal are uniformly multiplexed and vertically stretched as the respective information. However, when there is a lot of noise included in the composite video signal, the vertical high frequency information is added. There is a problem that directly causes deterioration of image quality on the display portion.

Accordingly, an object of the present invention is to provide a noise level adaptive vertical high power conversion circuit for controlling the amount of vertical high frequency information according to the noise level to prevent image degradation due to noise mixing.

According to the technical idea of the present invention for achieving the above object, the present invention provides a first AD conversion unit and the second AD conversion unit for converting the first input signal and the second input signal (AD), respectively, Noise level adaptive vertical high power factor including a multiplexer for selectively outputting a predetermined signal in response to the digitized signal of the first input signal and the second input signal, and a vertical stretcher that vertically stretches in response to the output signal of the multiplexer In the conversion circuit, an input terminal is connected to an output terminal of the first AD conversion unit, an output terminal is connected to an input terminal of the multiplexing unit, and a delay adjusting unit for delaying the digitized first input signal for a predetermined time, and an output terminal of the first AD conversion unit. An input terminal is connected to the digitized first input signal, a vertical synchronization signal, a horizontal synchronization signal, a clock, and a furnace. A noise level detector for detecting and outputting the noise level in response to each of the threshold voltage signals of an interest level, and a noise level of the noise level detector in response to the digitized second input signal from the second ADC converter. A second input signal amount adjusting unit for controlling and outputting a predetermined amount of the second input signal to the multiplexing unit, and connected to the multiplexing unit and the vertical stretching unit, respectively, by the vertical synchronizing signal, the horizontal synchronizing signal, and the clock. And a timing signal generator for generating and outputting a predetermined timing signal to be controlled.

DETAILED DESCRIPTION A detailed description of preferred embodiments of the present invention will now be described with reference to the accompanying drawings. It should be noted that like elements and parts in the figures are represented by the same numerals wherever possible.

In the case of ARM Plus TV, the second generation European ED TV, the transmitter generates vertical high-frequency information at 144 lines (upper 72 lines and lower 72 lines) per frame and transmits vertical low-frequency information to other 430 lines. . At this time, the receiving end reproduces the 576 active lines by mixing the vertical high frequency information and the vertical low frequency information. In the related art, the two input signals are vertically expanded by mixing the two input signals regardless of the noise level.

2 is a block diagram illustrating the structure of the vertical high power conversion circuit according to the present invention. Referring to FIG. 2, the configuration includes a first AD converter 100 for inputting a first input signal, for example, a composite video signal, and converting the digital data into digital data. A second AD converting unit 200 for converting to a second input unit, an input terminal is connected to an output terminal of the first AD converting unit 100, and a delay adjusting unit 101 for outputting the converted digital data with a predetermined time delay; An input terminal is connected to an output terminal of 200 and is controlled as a signal compared and detected by the noise level detector 500 to adjust the amount of the second input signal 201 and the first AD converter 100. An input terminal is connected to an output terminal, and is connected to the second input signal amount adjusting unit 201 so as to respond to the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync. A noise level detector 500 for outputting to the second input signal amount adjusting unit 201 through a predetermined comparison of the first input signal converted into data, and a respective output terminal of the delay adjusting unit 101 and the second input signal amount adjusting unit 201. An input terminal connected to the multiplexing unit 300 for determining and multiplexing and outputting the timing according to a logic value of each digital data, and an vertical extension unit 400 for vertically stretching the output data connected to an input terminal of an output terminal of the multiplexing unit 300; And a timing signal generator 600 connected to each of the multiplexer 300 and the vertical stretcher 400 to generate and output a timing signal in response to a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and a clock. Referring to FIG. 2, the composite video signal CVBS input to the first AD converter 100 includes only a low band vertically and is digitized by the first AD converter 100. On the other hand, vertical high-frequency information (Heiper) input to the second AD converter 200 is digitized in the second AD converter 200 with 72 lines each. The second input signal amount adjusting unit 201 is adjusted by the output noise level of the noise level detecting unit 500. The noise level detector 500 calculates a noise level by using a frame difference of a black level reference of 23 lines of the image signal. The noise level is multi-stage according to the number of noise level threshold voltages used at this time. In this case, 3 bits are used. The delay adjusting unit 101 adjusts the delay time according to the processing of the second input signal amount adjusting unit 201, and the multiplexing unit 300 is a timing signal of the vertical high band and the low band of the timing signal generator 600 (in this case, the first input). For example, the vertical high-band information is vertically mixed using a logic high state and the second input signal, for example, the vertical low-band information is low), and the result is input to the vertical extension unit 400 so that the vertical high-band information is emphasized. There is an effect that can be obtained.

Table 1 shows the case of the eighth step as an example of the second input signal amount adjusting element by the three-step noise level threshold voltage Th. Referring to Table 1, as the noise level is increased from '000' to '111', the adjustment element is decreased by 1/8 steps from '1' to '1/8'. Other embodiments may be emphasized even more.

3 is a detailed block diagram of the second input signal amount adjusting unit of FIG. Referring to FIG. 2, referring to FIG. 3, the digitized second input signal from the second AD converter 200 of FIG. Multipliers 202 to 208 for multiplying and output terminals and input terminals of the multipliers 202 to 208 are connected to each other, and a selector 332 for selecting and outputting necessary information in response to respective output information, and one output terminal of the selector 332. An input terminal is connected to the delay control unit 336 for outputting the output signal 339 to the vertical stretching unit 400 with a predetermined delay time. Here, the delay controller 336 is a circuit unit for matching the delay with the signal processing time of the noise level detector 500. Accordingly, the output signal of the delay adjusting unit 101 of FIG. 2 and the output signal 339 of the delay adjusting unit 336 of FIG. 3 are mixed in the multiplexing unit 300 shown in FIG. 2, so that the changed vertical high frequency information according to the noise level is changed. It is output to the vertical stretching unit 400.

Therefore, according to the present invention described above, it is possible to prevent the deterioration of image quality due to noise mixing by adjusting the amount of vertical high-frequency information according to the noise level change of the composite video signal.

Although the present invention described above is limited to, for example, the drawings, the same will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit of the present invention.

Claims (4)

A first AD conversion unit and a second AD conversion unit for AD conversion of the first input signal and the second input signal, respectively, and a predetermined response in response to the digitized signals of the first input signal and the second input signal. In the noise level adaptive vertical high capacity conversion circuit having a multiplexing unit for selectively outputting a signal and a vertical stretching unit vertically extending in response to the output signal of the multiplexing unit, an input terminal is connected to an output terminal of the first LED conversion unit. An output terminal is connected to an input terminal of the multiplexer and a delay adjusting unit is configured to delay the digitized first input signal for a predetermined time, and an input terminal is connected to an output terminal of the first AD converter, and the digitized first input signal and a vertical synchronization signal are connected to each other. The noise level is detected in response to a horizontal synchronization signal, a clock, and a threshold voltage signal of a noise level. Outputting the control unit and a second input signal controlled by the noise level detector in response to the digitized second input signal from the second ADC converter to adjust a predetermined amount of the second input signal to output to the multiplexing unit. A second input signal amount adjusting unit and a timing signal generating unit connected to the multiplexing unit and the vertical stretching unit, respectively, and controlled by the vertical synchronizing signal, the horizontal synchronizing signal, and a clock to generate and output a predetermined timing signal. A noise level adaptive vertical high capacity conversion circuit. The method of claim 1, wherein the first input signal amount adjusting unit reduces the second input signal amount when the noise level is greater than the level of the second input signal, and when the noise level is less than the level of the second input signal. A noise level adaptive vertical high capacity conversion circuit, characterized in that it is adjusted by increasing the second input signal amount. The multiplier of claim 2, wherein the second input signal amount adjusting unit multiplies the digitized second input signal, and selectively outputs one output signal having a predetermined value in response to output signals from the multiplier. And a delay adjuster for delaying a predetermined time in response to an output signal of the selector and outputting the delayed signal to the vertical stretcher. 4. The noise level adaptive vertical high capacity conversion circuit according to claim 3, wherein the output signals of the delay adjusting unit and the second input signal adjusting unit are adjusted according to the noise level and mixed into the multiplexing unit.