KR950002175B1 - Thin film silicon forming method for thin film sensor - Google Patents
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- KR950002175B1 KR950002175B1 KR1019920009140A KR920009140A KR950002175B1 KR 950002175 B1 KR950002175 B1 KR 950002175B1 KR 1019920009140 A KR1019920009140 A KR 1019920009140A KR 920009140 A KR920009140 A KR 920009140A KR 950002175 B1 KR950002175 B1 KR 950002175B1
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- 238000000034 method Methods 0.000 title claims abstract description 25
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 11
- 239000010703 silicon Substances 0.000 title claims abstract description 11
- 239000010409 thin film Substances 0.000 title claims description 29
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 238000005530 etching Methods 0.000 claims abstract description 17
- 238000000151 deposition Methods 0.000 claims abstract description 14
- 230000003647 oxidation Effects 0.000 claims abstract description 7
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 7
- 230000008021 deposition Effects 0.000 claims abstract description 6
- 238000005137 deposition process Methods 0.000 claims abstract 6
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims 1
- 238000007669 thermal treatment Methods 0.000 claims 1
- 238000007740 vapor deposition Methods 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 9
- 239000000463 material Substances 0.000 abstract description 3
- 230000035945 sensitivity Effects 0.000 abstract description 3
- 239000012528 membrane Substances 0.000 abstract description 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000010408 film Substances 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000009413 insulation Methods 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 238000002955 isolation Methods 0.000 description 3
- -1 phosphorus compound Chemical class 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- CFOAUMXQOCBWNJ-UHFFFAOYSA-N [B].[Si] Chemical compound [B].[Si] CFOAUMXQOCBWNJ-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Photometry And Measurement Of Optical Pulse Characteristics (AREA)
Abstract
Description
제 1 도는 종래의 박막 제조 공정도.1 is a conventional thin film manufacturing process diagram.
제 2 도는 본 발명의 박막 제조 공정도.2 is a thin film manufacturing process diagram of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1, 11 : 실리콘 웨이퍼 2 : Si3N4 1, 11: silicon wafer 2: Si 3 N 4
3, 13 : SiO34, 14 : Si3N4 3, 13: SiO 3 4, 14: Si 3 N 4
5 : 인화합물도핑폴리 Si 6, 16 : 센서소자5: phosphorus compound doped poly Si 6, 16: sensor element
12 : P++도핑층12: P ++ doping layer
본 발명은 박막센서용 Si 박막 형성방법에 관한 것으로써, 특히, 박막 센서의 단열과 기계적 특성이 우수한 박막을 형성할 수 있게한 방법을 제공하고자 한 것에 관한 것이다.The present invention relates to a method for forming a Si thin film for a thin film sensor, and more particularly, to provide a method for forming a thin film excellent in thermal insulation and mechanical properties of a thin film sensor.
일반적으로 Si 기판 위에 초전형 적외선 센서와 가스센서 등을 제조할 때 센서의 김도를 향상시키기 위해서 단열(Thermal Isolation)시킬 필요가 있는데, 이를 위해서 Si 웨이퍼(Wafer)를 에칭하여 가능하면 얇은 박막 위에 센서소자를 형성할 필요가 있다.In general, when manufacturing a pyroelectric infrared sensor and a gas sensor on a Si substrate, it is necessary to insulate the thermal insulation in order to improve the degree of stiffness of the sensor. It is necessary to form an element.
상기와 같이 박막 위에 센서소자를 형성하는 종래의 방법을 제 1 도에 따라서 설명하기로 한다.A conventional method of forming a sensor element on a thin film as described above will be described with reference to FIG.
실리콘 웨이퍼(11) 위에 a와 같이 보론(Born)을 임플란터(Implantor)로 주입하여 보론농도가 1019atoms/cm3이상되고 접합깊이(Junction Depth)가 4~6㎛ 정도의 p++도핑층(12)을 형성하고, b와 같이 열산화법으로 SiO2의 산화막(13)을 1000~2000Å입힌다. 상기 산화막(13) 위에 c와 같이 LPCVD(Liquid Phase Chemical Vapor Deposition)으로 Si2N4막(14)을 5000~1000㎛ 증착한 후 d와 같이 Si3N4막(14)의 스트레스(Stress)를 풀어주기 위하여 열처리를 한다.Boron is implanted on the silicon wafer 11 as an a implanter as shown in a. P ++ having a boron concentration of 10 19 atoms / cm 3 or more and a junction depth of about 4 to 6 μm. The doped layer 12 is formed, and the oxide film 13 of SiO 2 is coated with 1000 to 2000 kV by the thermal oxidation method as in b. After the Si 2 N 4 film 14 is deposited at 5000 to 1000 μm by LPCVD (Liquid Phase Chemical Vapor Deposition) as shown in c on the oxide film 13, the stress of the Si 3 N 4 film 14 as shown in d is as follows. Heat treatment to release the
그후, e와 같이 상기 Si3N4막(14)의 전면에 센서소자(6)를 형성하고 f와 같이 포토레지스터 작업을 통하여 후면에 Si3N4막(14)과 SiO2산화막(13)을 제거하여 윈도우(Window)를 만들고 이방용액(KOH, EDP 등)에서 에칭하여 P층에서 에칭이 멈추도록 하여 Si(P층), SiO1층, Si3N4층(14)의 3층으로 된 박막을 제조하였다.Then, the Si 3 N to the back front forming the sensor element (6) in and through the photoresist work as f Si 3 N 4 film 14 and the SiO 2 oxide film 13 of the fourth film 14, such as e To remove the window and etch in an anisotropic solution (KOH, EDP, etc.) to stop the etching in the P layer to three layers of Si (P layer), SiO 1 layer, Si 3 N 4 layer (14) Thin film was prepared.
상기와 같은 종래의 센서는 기판과 센서소자와의 단열(Thermal Isolation)을 위하여 센서소자의 아래는 가능한한 얇고 기계적 강도가 우수한 박막이 필요하게 된다. 박막이 얇아야 되는 이유는 박막이 얇을수록 열용량이 작으므로 센서소자와 기판사이의 열전도가 어려워지므로 기판에 남아있는 열에 의하여 센서소자의 온도가 변화하여 센서강도가 나빠지는 현상을 방지할 수 있기 때문이다. 따라서 이러한 박막을 제조하기 위하여 실리콘 보론으로 도핑(1019Atoms/cm3이상)할 때 실리콘의 에칭속도가 100배 이상으로 느려지는 현상을 이용하였다.The conventional sensor as described above requires a thin film having as thin and excellent mechanical strength as possible under the sensor element for thermal isolation between the substrate and the sensor element. The thin film is thinner because the thinner the thinner the heat capacity, which makes it difficult to conduct thermal conduction between the sensor element and the substrate. Therefore, the temperature of the sensor element is changed due to the heat remaining on the substrate. to be. Therefore, in order to manufacture such a thin film, the etching rate of silicon was slowed down to 100 times or more when doped with silicon boron (10 19 Atoms / cm 3 or more).
후면에서 실리콘을 에칭할 때는 P층을 만나면 에칭속도가 크게 느려저서 에칭이 멈추게 되고 SiO2(13)는 Si3N(14) 증착시 Si3N4의 막질을 좋게 하기 위해서 입혔으며 Si3N4(14)는 박막의 기계적 특성을 향상시켰을 뿐만 아니라 센서소자의 기판과 절연이 되도록 하여 센서의 누설전류를 방지하여 후면에칭시 에칭용 마스크로 사용되었다.When etching the silicon from the back meet the P layer significantly slow down the etching speed to stop the book etched and SiO 2 (13) are were overlaid in order to improve the film quality of the Si 3 N (14) During the deposition, Si 3 N 4 Si 3 N 4 (14) not only improved the mechanical properties of the thin film, but also was isolated from the substrate of the sensor element to prevent leakage current of the sensor and was used as a mask for etching during back etching.
그러나, 상기와 같은 종래의 센서는 센서소자와 기판(11)과의 단열(Thermal Isolation)을 위하여 Si(P++도핑층), SiO2, Si3N4의 3층으로된 박막을 사용할 경우, Si, SiO2는 취약하여 깨어지기 쉬우며, Si3N4는 높은 스트레스로 인하여 스트레스를 제거하는데에 어려움이 있어서, 안전하게 사용하기 위해서는 Si가 적어도 5㎛ 이상의 두께를 가져야 한다. 이 경우 막 두께가 두꺼워서 열용량이 커지므로 센서소자(16)와 기판(11)과의 단열(Thermal Isolation)이 잘되지 않아서 센서의 감도를 떨어뜨리는 문제가 있었다.However, the conventional sensor as described above uses a thin film of three layers of Si (P ++ doped layer), SiO 2 , and Si 3 N 4 for thermal isolation between the sensor element and the substrate 11. , Si, SiO 2 is fragile and fragile, Si 3 N 4 is difficult to remove the stress due to high stress, Si must have a thickness of at least 5㎛ to use safely. In this case, since the film thickness is large and the heat capacity is increased, the thermal isolation between the sensor element 16 and the substrate 11 is not good, thereby lowering the sensitivity of the sensor.
따라서, 본 발명은 상기와 같은 종래의 문제점을 해결하고자, 박막을 얇게 만드면서 기계적인 특성을 향상시키기 위하여 열산화에 의한 SiO2위에 LPCVD방법으로 Si3N4, Si, Si3N4를 연속 증착하고 후면을 이방성 에칭용액 에칭하여 얇은 박막을 형성하므로써 기판과 박막위에 형성되는 센서소자와 단열이 필요한 박막 초전형 적외선 센서와 박막 가스센서 등에 응용할 수 있게 한 것에 목적을 가진 것이다.Accordingly, the present invention, in order to solve the conventional problems as described above, in order to improve the mechanical properties while making the thin film thin Si 3 N 4 , Si, Si 3 N 4 by LPCVD method on the SiO 2 by thermal oxidation By depositing and etching the backside of the anisotropic etching solution to form a thin film, it is intended to be applied to the sensor element formed on the substrate and the thin film and the thin film pyroelectric infrared sensor and thin film gas sensor that require insulation.
상기와 같은 목적을 가진 실리콘 웨이퍼에 열산화방법으로 SiO2를 입히고 LPCVD방법으로 Si3N4와 인화합물 도핑 폴리(Phosphovus Doping Poly) Si과, Si3N4을 순서대로 연속 증착하고 전면에는 센서소자를 형성하고 후면에는 포토레지스터작업으로 윈도우를 만들고 Si을 이방성 에칭용액으로 에칭하여 Si3N4, 폴리 Si과 Si3N4의 3층으로 된 박막을 형성한 것을 특징으로 한다.SiO 2 was coated on the silicon wafer with the above purpose by thermal oxidation method, and Si 3 N 4 and Phosphhovus Doping Poly Si and Si 3 N 4 were sequentially deposited in order by LPCVD method. The device was formed and the window was formed by photoresist on the back side, and Si was etched with an anisotropic etching solution to form a thin film of three layers of Si 3 N 4 , poly Si and Si 3 N 4 .
이를 첨부도면 제 2 도에 따라서 제조공정을 설명하기로 한다.This will be described in the manufacturing process according to Figure 2 of the accompanying drawings.
a와 같이 실리콘 웨이퍼(1)에 열산화방법으로 SiO2(3)을 1000~2000Å 정도 입히고 b와 같이 상기 SiO2(3) 위에 LPCVD방법으로 Si3N4(4)을 약 3000Å 증착한 후 스트레스를 풀어주기 위하여 900℃에서 2시간 정도 열처리하였다.SiO 2 (3) is coated on the silicon wafer 1 by thermal oxidation method as in a, and Si 3 N 4 (4) is deposited on the SiO 2 (3) by LPCVD method as in b. Heat treatment at 900 ℃ for 2 hours to release the stress.
그다음c와 같이 인화합물 도핑폴리 Si(5)를 1-2㎛ 정도 증착한후 스트레스를 풀기 위하여 1050℃에서 1시간 정도 열처리를 한다.Then, after depositing about 1-2㎛ of the phosphorus compound doped poly Si (5) as shown in c is subjected to heat treatment at 1050 ℃ for 1 hour.
그 후에 d와 같이 상기 폴리 Si(5) 위에 Si3N4(2)을 약 3000Å 정도 증착한 후 열처리 하였다. 그리고 e와 같이 후면에 포토레지스터를 통하여 윈도우를 형성하고 f와 같이 센서소자(6)를 형성한 다음 g와 같이 이방성 에칭용액(KOH 또는 EDP 등)으로 실리콘을 에칭하여 SiN4(4)에서 에칭이 멈출 수 있도록하여 Si3N4(4)와, Si(5) Si3N4(2)의 3층으로 된 얇은 박막을 형성하여 센서소자와 기판을 제조한다.Thereafter, as described in d, Si 3 N 4 (2) was deposited on the poly Si (5) about 3000 kPa and then heat-treated. Then, a window is formed through the photoresist on the rear surface as shown in e, and the sensor element 6 is formed as shown in f. Then, silicon is etched with an anisotropic etching solution (KOH or EDP, etc.) as shown in g, and then etched in SiN 4 (4) This stops to form a thin thin film of three layers of Si 3 N 4 (4) and Si (5) Si 3 N 4 (2) to produce a sensor element and a substrate.
이와 같이 제조된 본 발명의 작용효과를 설명하기로 한다.The effects of the present invention prepared as described above will be described.
인화합물로 도핑이된 폴리 Si(5) 박막은 적절한 온도에서 어닐링(Annealing)하여 스트레스를 풀어주면 기계적 특성이 아주 우수한 박막이 형성될 수 있다.A poly Si (5) thin film doped with a phosphorus compound may be annealed at an appropriate temperature to release stress to form a thin film having excellent mechanical properties.
따라서, 본 발명은 이를 응용하여 단열을 위한 박막으로 사용할 경우 충분한 기계적 강도를 가지기 위하여서는 다른 재료의 경우 5㎛ 이상의 두께가 되어야 하나 인화합물 도핑 폴리 Si 경우는 1㎛ 정도로도 충분히 형성할 수 있다.Therefore, in the present invention, in order to have sufficient mechanical strength when using this as a thin film for thermal insulation, the thickness of other materials should be 5 μm or more, but phosphorus compound-doped poly Si may be sufficiently formed to about 1 μm.
본 발명에서는 Si3N4(4)와 인화물 도핑 폴리 Si(5)와 Si3N4(4)의 3층으로 된 막을 형성하여 제일 아래의 Si3N4(4)는 Si 에칭을 멈추게 하는데 사용하였으며, 폴리 Si(5)은 기계적 강도를 유지하는데 이용되었고, Si3N4(4)는 센서 소자와 기판간의 전기적 절연이 되도록 하여 센서소자와 누설전류를 방지할 수 있도록 하였다.In the present invention, a three-layer film of Si 3 N 4 (4) and phosphide-doped poly Si (5) and Si 3 N 4 (4) is formed so that the bottom Si 3 N 4 (4) stops the Si etching. Poly Si (5) was used to maintain the mechanical strength, and Si 3 N 4 (4) was to provide electrical insulation between the sensor element and the substrate to prevent the sensor element and leakage current.
이와 같이 본 발명은 기계적 특성이 우수한 LPCVD로 형성한 폴리 Si을 멤블레인 재료로 사용하므로써 1㎛ 정도의 두께로도 센서소자 형성에 필요한 기계적 강도를 지니게 되어 박막을 얇아져서 센서와 기판과의 단열이 완전하게 이루어지는 센서의 감도를 향상시킬 수 있게 된 유용한 것이다.As described above, the present invention uses the poly Si formed by LPCVD with excellent mechanical properties as a membrane material to have the mechanical strength necessary for forming the sensor element even with a thickness of about 1 μm, thereby thinning a thin film to insulate the sensor from the substrate. It is useful to improve the sensitivity of the complete sensor.
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WO2010117178A2 (en) * | 2009-04-06 | 2010-10-14 | 주식회사 레오모터스 | Power-generating apparatus for an electric vehicle |
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WO2010117178A2 (en) * | 2009-04-06 | 2010-10-14 | 주식회사 레오모터스 | Power-generating apparatus for an electric vehicle |
WO2010117178A3 (en) * | 2009-04-06 | 2010-12-23 | 주식회사 레오모터스 | Power-generating apparatus for an electric vehicle |
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