KR940023074A - Control circuit for system maintenance and repair in communication device - Google Patents

Control circuit for system maintenance and repair in communication device Download PDF

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Publication number
KR940023074A
KR940023074A KR1019930004277A KR930004277A KR940023074A KR 940023074 A KR940023074 A KR 940023074A KR 1019930004277 A KR1019930004277 A KR 1019930004277A KR 930004277 A KR930004277 A KR 930004277A KR 940023074 A KR940023074 A KR 940023074A
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South Korea
Prior art keywords
signal
state
separation
clock
unit
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KR1019930004277A
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Korean (ko)
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KR960012308B1 (en
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최민선
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김광호
삼성전자 주식회사
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Priority to KR1019930004277A priority Critical patent/KR960012308B1/en
Publication of KR940023074A publication Critical patent/KR940023074A/en
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B17/00—Monitoring; Testing

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Hardware Redundancy (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)

Abstract

본 발명은 시스템 유지/보수를 제공하는 통신장치에 관한 것으로, 특히 동작상태의 고장난 시스템으로부터 대기상태에 있는 다른 시스템을 동작상태로 절체하는 상태에서 시스템의 동작을 지속적으로 출력토록하는 제어회로에 관한 것이다.The present invention relates to a communication device for providing system maintenance and, more particularly, to a control circuit for continuously outputting the operation of the system in the state of switching from the failed system in the operating state to another system in the standby state. will be.

제1클럭유니트와 제2클럭유니트에 위치하고 상기 제1,2클럭유니트의 분리/결합(실장/탈장)상태를 시스템프로세서의 인터럽트발생부와 상태편 클럭유니트에 분리/결합(실장/탈장)신호를 제공하는 슬롯체크부와, 슬롯체크부에서 출력되는 분리(탈장)신호에 응답하여 제1클럭유니트와 제2클럭유니트로 작동신호 또는 대기신호를 재결정하여 출력되는 시스템프로세서와, 시스템프로세서의 동작상태의 작동신호에 응답하여 각 부에 필요한 각 분주의 클럭을 출력하는 클럭발생부와, 각 시스템의 분리/결합(실장/탈장)에 따른 작동신호에 응답하여 각 모듈에 지속적인 신호처리를 제공하는 클럭제어회로로 구성되어 있다.Separating / combining (mounting / detaching) signals of the first clock unit and the second clock unit and separating / combining (mounting / detaching) states of the first and second clock units into the interrupt generator and the state clock unit of the system processor. And a slot checker for providing a system processor, a system processor outputting the first clock unit and the second clock unit by re-determining an operation signal or a standby signal in response to a separation (separation) signal output from the slot check unit, and an operation of the system processor. The clock generator outputs the clock of each division necessary for each unit in response to the operation signal of the state, and provides continuous signal processing to each module in response to the operation signal according to the separation / combination (mounting / detaching) of each system. It consists of a clock control circuit.

상술한 것과 같이 본 발명은 각 시스템의 분리/결합(실장/탈장)에 따른 시스템의 절체로 클럭의 손실 또는 불안정한 상태의 클럭이 각 모듈에 출력되는 문제점을 해결함으로 연속적인 신호처리를 제공하여 지속적인 시스템의 동작을 수행하는 잇점이 있다.As described above, the present invention provides continuous signal processing by solving a problem in which a clock is lost or an unstable clock is outputted to each module due to system switching due to separation / combination (mounting / dismounting) of each system. There is an advantage to performing the operation of the system.

Description

통신장치에 있어서 시스템 유지 및 보수를 위한 제어회로Control circuit for system maintenance and repair in communication device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명의 통신장치에 있어서 시스템 유지/보수를 위한 블럭도이고, 제3도는 제2도의 구체적인 회로도이며, 제4도는 제4도(a)와 제4도(b)로 도시되어 있고 제3도중 초기화부(28A,28B)의 출력파형도이다.FIG. 2 is a block diagram for system maintenance and repair in the communication apparatus of the present invention. FIG. 3 is a detailed circuit diagram of FIG. 2, and FIG. 4 is shown in FIGS. 4 (a) and 4 (b). 3 is an output waveform diagram of the initialization units 28A and 28B.

Claims (5)

시스템 유지/보수를 위한 동작 수행을 제공하는 제1시스템과 제2시스템으로 구성되는 통신장치에 있어서, 상기 제1시스템과 제2시스템의 결합과 분리 상태에 따라 결합신호와 분리신호를 유지하는 감시수단과, 상기 제2시스템의 고장으로 분리 보수를 하기위해 상기 제2시스템의 분리를 나타내는 분리신호를 감지하여 작동과 대기 상태의 신호를 재결정하여 제1시스템으로 작동신호를 출력하는 동작결정수단과, 상기 동작결정수단으로부터 출력되는 작동신호와 상기 감시수단의 분리신호를 입력으로 논리제어하여 제2시스템의 분리에 따른 제1시스템의 작동을 수행토록 하여 연속적인 신호처리를 제공하는 신호제어수단으로 구성함을 특징으로 하는 장치.A communication device comprising a first system and a second system for providing an operation for system maintenance, the monitoring device comprising: a monitoring to maintain a combined signal and a separated signal according to a combined and disconnected state of the first system and a second system; Means and an operation determining means for detecting a separation signal indicating separation of the second system to reconstruct and repair the failure of the second system, re-determining an operation and standby signal, and outputting an operation signal to the first system; And a signal control means for providing continuous signal processing by performing operation of the first system according to the separation of the second system by logically controlling the operation signal output from the operation determination means and the separation signal of the monitoring means as input. Device characterized in that the configuration. 제1항에 있어서, 상기 신호제어수단은 상기 동작결정수단으로부터 출력되는 작동신호를 소정시간 유지하고 상기 동작결정수단의 고장으로 분리보수에 따른 대기신호에는 하이임피던스상태를 유지하는 래치회로와, 상기 래치회로로부터 출력되는 신호와 상기 감시수단의 분리신호를 연산하여 제어신호를 출력하는 제어선택회로로 구성함을 특징으로 하는 회로.The latch circuit of claim 1, wherein the signal control means maintains an operation signal output from the operation determination means for a predetermined time and maintains a high impedance state in a standby signal according to the separation and repair due to a failure of the operation determination means. And a control selection circuit for outputting a control signal by calculating a signal output from the latch circuit and a separation signal of the monitoring means. 제1항에 있어서, 상기 감시수단은 상기 제1시스템과 제2시스템에 각각 위치하고 상기 동작결정수단과 상태편의 제1시스템, 제2시스템으로 분리결합상태를 제공하는 회로.2. The circuit according to claim 1, wherein said monitoring means is located in said first system and said second system, respectively, and provides a separate coupling state to said operation determining means and said first system of said state piece, and said second system. 제1항 또는 제3항에 있어서, 상기 동작결정수단은 상기 감시수단의 분리신호를 인식하는 인터럽트발생부를 포함하고, 상기 인터럽트발생부의 출력신호에 의하여 작동신호와 대기신호를 재결정하여 제1시스템과 제2시스템으로 작동신호를 출력하는 시스템프로세서로 구성함을 특징으로 하는 회로.4. The system according to claim 1 or 3, wherein the operation determining means includes an interrupt generator for recognizing a separation signal of the monitoring means, and re-determines the operation signal and the standby signal according to the output signal of the interrupt generator. And a system processor for outputting an operation signal to the second system. 제1항 또는 제2항에 있어서, 제1시스템과 제2시스템에 위치하고 고장수리한 상기 제1시스템 또는 제2시스템의 결합순간에 RC시정수에 의해 소정시간동안 제1상태를 유지하고 상기 소정시간 후 제2상태로 변경되어 출력하는 제1신호와 상기 제어선택회로에서 출력되는 신호를 입력으로 논리연산하여 상기 제1시스템 또는 제2시스템의 결합전 제어신호를 유지하여 출력하는 초기화부를 더 구비함을 특징으로 하는 회로.The method according to claim 1 or 2, wherein the first state and the second system are located in the first system and the second system, and the first state or the second system is maintained at the first state for a predetermined time by a RC time constant at the moment of coupling. And an initializing unit configured to maintain and output a control signal before coupling of the first system or the second system by performing a logical operation on the first signal outputted after the change to the second state and the signal output from the control selection circuit. Circuit characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930004277A 1993-03-19 1993-03-19 Control circuit for telecommunication system KR960012308B1 (en)

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Application Number Priority Date Filing Date Title
KR1019930004277A KR960012308B1 (en) 1993-03-19 1993-03-19 Control circuit for telecommunication system

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Application Number Priority Date Filing Date Title
KR1019930004277A KR960012308B1 (en) 1993-03-19 1993-03-19 Control circuit for telecommunication system

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KR940023074A true KR940023074A (en) 1994-10-22
KR960012308B1 KR960012308B1 (en) 1996-09-18

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