KR940020685A - Frequency Synthesis Circuit - Google Patents

Frequency Synthesis Circuit Download PDF

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Publication number
KR940020685A
KR940020685A KR1019930002994A KR930002994A KR940020685A KR 940020685 A KR940020685 A KR 940020685A KR 1019930002994 A KR1019930002994 A KR 1019930002994A KR 930002994 A KR930002994 A KR 930002994A KR 940020685 A KR940020685 A KR 940020685A
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KR
South Korea
Prior art keywords
frequency
channel
generating
synthesizing
designated
Prior art date
Application number
KR1019930002994A
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Korean (ko)
Inventor
손병걸
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019930002994A priority Critical patent/KR940020685A/en
Publication of KR940020685A publication Critical patent/KR940020685A/en

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

본 발명은 주파수합성회로에서 호핑되는 채널주파수의 안정화시간을 단축하여 고속으로 채널을 스위칭할 수 있는 회로를 제공한다. 이를 위하여 본 발명은 위상 고정루프 방식으로 원하는 대역의 국부발진 주파수를 발생하기 위한 국부발진 주파수 발생수단과, 채널 지정데이타를 수신하며 디지탈 합성수단을 이용하여 지정된 채널지정주파수를 발생하는 수단과, 상기 국부발진주파수와 상기 채널주파수를 합성하여 지정된 채널로 호핑된 주파수를 고속으로 발생하는 수단을 구비한다. 따라서 채널주파수를 변경할 시 디지탈합성수단에서 발생하는 채널지정주파수의 안정화시간으로 원하는 채널주파수를 발생할 수 있다.The present invention provides a circuit capable of switching channels at high speed by shortening the stabilization time of a channel frequency hopping in a frequency synthesis circuit. To this end, the present invention provides a local oscillation frequency generating means for generating a local oscillation frequency of a desired band in a phase locked loop method, means for receiving channel designation data and generating a designated channel designation frequency using digital synthesis means; Means for synthesizing the local oscillation frequency and the channel frequency to generate a high frequency hopping frequency to a designated channel. Therefore, when the channel frequency is changed, the desired channel frequency can be generated by the stabilization time of the channel specified frequency generated by the digital synthesis means.

Description

주파수합성회로Frequency Synthesis Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 주파수합성회로의 구성도.2 is a block diagram of a frequency synthesis circuit according to the present invention.

Claims (4)

주파수합성회로에 있어서, 위상고정루프 방식으로 원하는 대역의 국부발진 주파수를 발생하기 위한 국부발진 주파수 발생수단과, 채널 지정데이타를 수신하며 디지탈 합성수단을 이용하여 지정된 채널지정주파수를 발생하는 수단과, 상기 국부발진주파수와 상기 채널주파수를 합성하여 지정된 채널로 호핑된 주파수를 고속으로 발생하는 수단으로 구성된 것을 특징으로 하는 주파수합성회로.1. A frequency synthesizing circuit comprising: local oscillation frequency generating means for generating a local oscillation frequency of a desired band in a phase-locked loop method, means for receiving channel designation data and generating a designated channel designation frequency using digital synthesizing means; And means for synthesizing the local oscillation frequency and the channel frequency to generate a high frequency hopping frequency to a designated channel. 제1항에 있어서, 채널지정주파수를 발생하는 수단이, 소정의 발진신호를 발생하는 수단과, 상기 발진신호를 클럭으로 수신하고 상기 채널지정데이타를 수신하며, 상기 발진신호에 의해 상기 채널지정데이타를 사인진폭값을 갖는 디지탈데이타로 합성하는 수단과, 상기 디지탈데이타를 아날로그신호로 변환하여 채널지정주파수 신호를 출력하는 수단으로 구성된 것을 특징으로 하는 주파수합성회로.2. The apparatus according to claim 1, wherein the means for generating a channel designated frequency comprises: means for generating a predetermined oscillation signal, receiving the oscillation signal as a clock and receiving the channel designated data, and receiving the channel designated data by the oscillation signal. And means for synthesizing the signal into digital data having a sine amplitude, and means for converting the digital data into an analog signal and outputting a channel designated frequency signal. 제1항 또는 제2항에 있어서, 상기 채널지정주파수를 수신하여 미리 설정된 배수로 체배하여 상기 합성수단으로 인가하는 수단을 더 구비한 것을 특징으로 하는 주파수합성회로.3. The frequency synthesizing circuit according to claim 1 or 2, further comprising means for receiving the channel specified frequency, multiplying it by a predetermined multiple, and applying it to the synthesizing means. 제3항에 있어서, 합성수단이, 상기 국부발진주파수와 채널지정주파수를 수신하며, 수신되는 두 주파수신호를 믹싱하여 각각 하이배늣 및 로우밴드의 채널주파수로 출력하는 수단과, 상기 채널주파수를 수신하며 지정된 밴드의 채널주파수를 선택하여 여파하는 수단으로 구성된 것을 특징으로 하는 주파수합성회로.4. The apparatus of claim 3, wherein the synthesizing means receives the local oscillation frequency and the channel designated frequency, mixes two received frequency signals and outputs the channel frequencies of high frequency and low band, respectively, and receives the channel frequency. And means for filtering by selecting channel frequencies of the specified bands. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930002994A 1993-02-27 1993-02-27 Frequency Synthesis Circuit KR940020685A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930002994A KR940020685A (en) 1993-02-27 1993-02-27 Frequency Synthesis Circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930002994A KR940020685A (en) 1993-02-27 1993-02-27 Frequency Synthesis Circuit

Publications (1)

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KR940020685A true KR940020685A (en) 1994-09-16

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KR1019930002994A KR940020685A (en) 1993-02-27 1993-02-27 Frequency Synthesis Circuit

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