KR940016917A - Method of manufacturing thin film transistor - Google Patents
Method of manufacturing thin film transistor Download PDFInfo
- Publication number
- KR940016917A KR940016917A KR1019920026370A KR920026370A KR940016917A KR 940016917 A KR940016917 A KR 940016917A KR 1019920026370 A KR1019920026370 A KR 1019920026370A KR 920026370 A KR920026370 A KR 920026370A KR 940016917 A KR940016917 A KR 940016917A
- Authority
- KR
- South Korea
- Prior art keywords
- active layer
- contact resistance
- thin film
- film transistor
- resistance layer
- Prior art date
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 6
- 238000004519 manufacturing process Methods 0.000 title claims abstract 4
- 239000010408 film Substances 0.000 claims abstract 5
- 150000002500 ions Chemical class 0.000 claims abstract 3
- 239000000758 substrate Substances 0.000 claims abstract 3
- 238000000034 method Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
본 발명은 박막트랜지스터에 관한 것으로 박막트랜지스터의 접촉저항층 제조방법에 관한 것이다.The present invention relates to a thin film transistor, and to a method for manufacturing a contact resistance layer of a thin film transistor.
종래에는 기판(b)위에 게이트전극(1)과 절연막(4)을 형성하고, 그위에 활성층(3)과 접촉저항층(5)을 차례로 형성한뒤 소오스/드레인전극(2)을 형성하여 소오스/드레인전극(2)을 마스크로 이용하여 채널영역의 접촉저항층(5)을 제거하였다.Conventionally, the gate electrode 1 and the insulating film 4 are formed on the substrate b, the active layer 3 and the contact resistance layer 5 are sequentially formed thereon, and then the source / drain electrodes 2 are formed to form a source. The contact resistance layer 5 in the channel region was removed using the / drain electrode 2 as a mask.
따라서 채널영역의 접촉저항층이 완벽하게 제거되지 않고 접촉저항층의 n+이온이 활성층에 확산되어 완전한 오프동작이 어렵고 확산된 활성층을 제거할때 과도식각되어 문턱전류 및 온전류가 증가되는 결점이 있었다.Therefore, the contact resistance layer of the channel region is not completely removed, and n + ions of the contact resistance layer are diffused into the active layer, so that it is difficult to completely turn off the operation, and when the diffused active layer is removed, the threshold current and the on current are increased. there was.
본 발명은 기판(6)위에 게이트전극(1)과 절연막(4) 활성층(3)을 형성한뒤 활성층(3)의 채널영역에 마스킹하고 n+이온을 활성층 표면에 주입하여 접촉저항층(5)을 형성한 것이다.The present invention forms a gate electrode 1 and an insulating film 4 on the substrate 6 and then masks the active layer 3 in the channel region of the active layer 3 and injects n + ions into the surface of the active layer to form a contact resistance layer 5. ) Is formed.
따라서 종래의 결점을 해결한다.Therefore, the conventional drawback is solved.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 3 도는 본 발명의 박막트랜지스터 평면도, 제 4 도는 제 4 도의 B-B' 선상 단면도, 제 5 도는 본 발명 박막트랜지스터 공정 단면도.3 is a plan view of a thin film transistor of the present invention, FIG. 4 is a sectional view taken along line B-B 'of FIG. 4, and FIG.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920026370A KR960006111B1 (en) | 1992-12-30 | 1992-12-30 | Thin film transistor manufacturing process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920026370A KR960006111B1 (en) | 1992-12-30 | 1992-12-30 | Thin film transistor manufacturing process |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940016917A true KR940016917A (en) | 1994-07-25 |
KR960006111B1 KR960006111B1 (en) | 1996-05-08 |
Family
ID=19347497
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920026370A KR960006111B1 (en) | 1992-12-30 | 1992-12-30 | Thin film transistor manufacturing process |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960006111B1 (en) |
-
1992
- 1992-12-30 KR KR1019920026370A patent/KR960006111B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR960006111B1 (en) | 1996-05-08 |
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