KR940016905A

KR940016905A - Thin film transistor structure and manufacturing method

Info

Publication number: KR940016905A
Application number: KR1019920025271A
Authority: KR
Inventors: 김건태
Original assignee: 이헌조; 주식회사 금성사
Priority date: 1992-12-23
Filing date: 1992-12-23
Publication date: 1994-07-25

Abstract

본 발명은 박막트랜지스터에 관한 것으로 게이트전극의 굴곡 및 단차를 없애는 박막트랜지스터 구조 및 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor, and to a thin film transistor structure and a manufacturing method for eliminating the bending and step of the gate electrode.

종래에는 유리기판(1)에 게이트전극(2)을 형성하고 그위에 절연막과 활성층 소오스/드레인 전극등을 형성하였다. 따라서 게이트전극에 단차가 형셩되어 이 단차로 인하여 단선, 단락이 발생하고, 절연막을 두껍게 형성해야 하며, 박막트랜지스터 면적이 넓어져서 액정표시소자의 개구율이 감소되었다.Conventionally, the gate electrode 2 is formed on the glass substrate 1, and an insulating film and an active layer source / drain electrode are formed thereon. Therefore, a step is formed in the gate electrode, which causes disconnection and short circuit, and a thick insulating film must be formed, and the area of the thin film transistor is increased, thereby reducing the aperture ratio of the liquid crystal display device.

본 발명은 유리기판(1)에 보호용 절연막(10)을 형성하여 게이트전극이 형성될 부분을 제거한뒤 제 1 금속으로 1차게이트 전극을 저의하고 제 2 금속을 증착하여 양극산화하는 방법으로 게이트전극의 단차 및 굴곡을 해결한 것이다. 따라서, 단락, 단선의 염려가 없고 박막트랜지스터의 면적이 축소되므로 액정표시소자의 개구율이 증가한다.According to the present invention, a protective insulating film 10 is formed on a glass substrate 1 to remove a portion where a gate electrode is to be formed, and then a primary gate electrode is used as a first metal, and a second metal is deposited to anodize the gate electrode. Steps and bends will be solved. Accordingly, there is no fear of short circuit or disconnection and the area of the thin film transistor is reduced so that the aperture ratio of the liquid crystal display element is increased.

Description

Thin film transistor structure and manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 3 도는 종래의 다른 실시예의 박막트랜지스터 구조 단면도, 제 4 도는 본 발명의 박막트랜지스터 단면도, 제 5 도는 본 발명의 박막트랜지스터 공정단면도.3 is a cross-sectional view of a thin film transistor structure of another conventional embodiment, FIG. 4 is a cross-sectional view of a thin film transistor of the present invention, and FIG.

Claims

The transparent glass substrate 1, the gate electrode 2 formed on the transparent glass substrate 1, the protective insulating film 10 having the same height as the gate electrode 2 on both sides of the gate electrode 2, and the gate electrode ( 2) and the first and second insulating films 3 and 11 formed over the protective insulating film 10, the active layer 4 formed above the gate electrode on the second insulating film 10, and both sides of the active layer 4 A thin film transistor structure comprising a source / drain electrode (6) formed and a contact resistance layer (5) formed between the active layer (4) and the source / drain electrodes (6,7).

Depositing a protective insulating film 10 on the transparent substrate 1 and selectively removing a region where a gate electrode is to be formed; depositing a first metal 2a and first patterning a gate electrode; (2b) depositing and anodizing to form the gate electrode 2 and the first insulating film 3, and the second insulating film 11, the active layer 4, and the contact resistance layer 5 on the first insulating film. Laminating and defining the active layer 4 and the contact resistance layer 5, and forming the source / drain electrodes 6, 7 and removing the contact resistance layer 5 in the channel region. Thin film transistor manufacturing method.

The method of claim 2, wherein the protective insulating film (10) is formed of a thickness of 1000 ~ 5000 ₃ by selecting one of SiO ₂ , Al ₂ O ₃ , Ta ₂ O ₅ .

The method of claim 2, wherein the first and second metals (2a, 2b) are formed by selecting one of Al, Ta, and MoTa.

※ Note: The disclosure is based on the initial application.