KR940016565A - Lithography Process - Google Patents
Lithography Process Download PDFInfo
- Publication number
- KR940016565A KR940016565A KR1019920026730A KR920026730A KR940016565A KR 940016565 A KR940016565 A KR 940016565A KR 1019920026730 A KR1019920026730 A KR 1019920026730A KR 920026730 A KR920026730 A KR 920026730A KR 940016565 A KR940016565 A KR 940016565A
- Authority
- KR
- South Korea
- Prior art keywords
- pattern
- film
- lithography process
- photoresist
- photosensitive film
- Prior art date
Links
Landscapes
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
본 발명은 반도체 소자의 감광막 패턴을 형성할때 감광막이 두께에 따라 감광막 패턴의 패턴크기가 변화되는 것을 방지하기 위하여 패턴하고자 하는 하부층 상부에 하층 비반사막, 감광막 및 상층 비반사막을 적층한 다음, 리소그라피 공정에 의해 감광막 패턴을 형성하는 기술이다.In the present invention, when the photoresist pattern of the semiconductor device is formed, a lower antireflection film, a photoresist film, and an upper antireflection film are laminated on the lower layer to be patterned to prevent the pattern size of the photoresist pattern from changing according to thickness. It is a technique of forming a photosensitive film pattern by a process.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 2 도는 본 발명에 의해 감광막 상부 및 하부에 비반사막을 형성한 단면도.2 is a cross-sectional view of the anti-reflection film formed on the upper and lower photosensitive film according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920026730A KR940016565A (en) | 1992-12-30 | 1992-12-30 | Lithography Process |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920026730A KR940016565A (en) | 1992-12-30 | 1992-12-30 | Lithography Process |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940016565A true KR940016565A (en) | 1994-07-23 |
Family
ID=67215260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920026730A KR940016565A (en) | 1992-12-30 | 1992-12-30 | Lithography Process |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940016565A (en) |
-
1992
- 1992-12-30 KR KR1019920026730A patent/KR940016565A/en not_active Application Discontinuation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR950004370A (en) | Method and structure for forming an integrated circuit pattern on a semiconductor substrate | |
KR840006728A (en) | Integrated circuit manufacturing method | |
KR940016565A (en) | Lithography Process | |
KR937000886A (en) | Formation method of fine resist pattern | |
JPS5580323A (en) | Pattern forming method for photoresist-film | |
KR970008372A (en) | Fine Pattern Formation Method of Semiconductor Device | |
KR950009942A (en) | Pattern formation method of semiconductor device | |
JPS5655950A (en) | Photographic etching method | |
JPS568821A (en) | Formation of photoresist layer | |
KR920022422A (en) | Pattern Formation Method | |
KR950021157A (en) | Semiconductor device manufacturing method | |
KR970051898A (en) | Pattern Forming Method of Semiconductor Device | |
KR970017948A (en) | Organic antireflection film manufacturing method | |
KR940016689A (en) | Metal wiring planarization method of semiconductor device | |
KR980005764A (en) | An etching method for patterning two or more metal layers | |
KR970051894A (en) | Method of forming fine pattern of semiconductor device | |
KR970003559A (en) | Method of forming fine pattern of semiconductor device | |
KR910020493A (en) | Double exposure method by double coating of resist | |
KR940015695A (en) | Pattern formation method of semiconductor device | |
KR960011550A (en) | Double etching cross section formation method | |
KR940004747A (en) | Resist Pattern Forming Method | |
KR950027931A (en) | How to make photomask | |
KR970018028A (en) | Metal contact formation method of semiconductor device | |
KR970054532A (en) | Device Separation Method of Semiconductor Device | |
KR960019517A (en) | Method for manufacturing contact hole of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |