KR940012158A - Serial data communication method between microcomputers - Google Patents
Serial data communication method between microcomputers Download PDFInfo
- Publication number
- KR940012158A KR940012158A KR1019920021370A KR920021370A KR940012158A KR 940012158 A KR940012158 A KR 940012158A KR 1019920021370 A KR1019920021370 A KR 1019920021370A KR 920021370 A KR920021370 A KR 920021370A KR 940012158 A KR940012158 A KR 940012158A
- Authority
- KR
- South Korea
- Prior art keywords
- data
- microcomputers
- serial
- microcomputer
- data communication
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
Abstract
본 발명은 제1 및 제2 마이컴(10) 및 (20)간의 시리얼 데이타 통신 방법에 관한 것이다. 제1마이컴(10)은 데이타 출력 단자(DAOT)로부터 사전설정된 기간동안 로우 레벨의 신호를 발생한다. 이 로우 레벨의 신호는 제2 마이컴(20)에 대하여 데이타 송신 준비(Ready) 신호로서 사용된다. 그후 제1 및 제1 마이컴(10) 및 (20)간에 데이타가 전송 및 수신된다. 각각의 마이컴은 데이타 입력단자(DIN)를 통한 데이타의 수신과 동시에 새로운 전송 데이타를 각각의 시리얼 레지스터(25)를 통하여 시리얼 버퍼(15)내에 로드시킨다. 사전설정된 갯수의 데이타 송신 완료 후 제1 마이컴(10)은 상기 사전설정된 기간동안 로우 레벨의 신호를 또다시 발생하며, 이 신호는 제2 마이컴(20)에 대하여 데이타 전송 및 수신의 완료를 나타낸다. 본 발명에 따라서, 제1 및 제2 마이컴(10)(20)에서 전형적으로 사용되는 준비(Ready) 단자가 절약될 수 있다. 이들 마이컴은 VCR에서 사용되는 서보/시스콘 마이컴 및 타이머 마이컴으로 구현된다.The present invention relates to a serial data communication method between the first and second microcomputers 10 and 20. The first microcomputer 10 generates a low level signal for a predetermined period from the data output terminal DAOT. This low level signal is used as a data transmission ready signal for the second microcomputer 20. Thereafter, data is transmitted and received between the first and first microcomputers 10 and 20. Each microcomputer loads new transmission data into the serial buffer 15 through each serial register 25 at the same time as the data is received through the data input terminal DIN. After completion of the predetermined number of data transmissions, the first microcomputer 10 generates a low level signal again during the predetermined period, which indicates completion of data transmission and reception with respect to the second microcomputer 20. According to the present invention, ready terminals typically used in the first and second microcomputers 10 and 20 can be saved. These microcomputers are implemented with servo / ciscon microcomputers and timer microcomputers used in VCRs.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제3도는 본 발명에 따른 서보/시스콘 마이컴의 시리얼 통신을 예시하는 플로우 차트,3 is a flow chart illustrating serial communication of a servo / ciscon microcomputer according to the present invention;
제5도는 본 발명에 따른 서보/ 시스콘 마이컴에 의해 수행되는 3선식 시리얼 통신의 타이밍도.5 is a timing diagram of three-wire serial communication performed by the servo / ciscon micom according to the present invention.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920021370A KR960016413B1 (en) | 1992-11-13 | 1992-11-13 | Serial data communication method between microcomputer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920021370A KR960016413B1 (en) | 1992-11-13 | 1992-11-13 | Serial data communication method between microcomputer |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940012158A true KR940012158A (en) | 1994-06-22 |
KR960016413B1 KR960016413B1 (en) | 1996-12-11 |
Family
ID=19343121
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920021370A Expired - Fee Related KR960016413B1 (en) | 1992-11-13 | 1992-11-13 | Serial data communication method between microcomputer |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960016413B1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100442853B1 (en) * | 1997-09-18 | 2005-05-24 | 삼성전자주식회사 | Communication method between optical disc servo and micom |
KR100792703B1 (en) * | 2005-07-21 | 2008-01-11 | 신 에트케 테크놀로지 컴퍼니 리미티드 | Serial data transmission method and system |
-
1992
- 1992-11-13 KR KR1019920021370A patent/KR960016413B1/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100442853B1 (en) * | 1997-09-18 | 2005-05-24 | 삼성전자주식회사 | Communication method between optical disc servo and micom |
KR100792703B1 (en) * | 2005-07-21 | 2008-01-11 | 신 에트케 테크놀로지 컴퍼니 리미티드 | Serial data transmission method and system |
Also Published As
Publication number | Publication date |
---|---|
KR960016413B1 (en) | 1996-12-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR980007258A (en) | I²C communication device using general purpose microcomputer | |
US5079548A (en) | Data packing circuit in variable length coder | |
KR880009381A (en) | Semiconductor integrated circuit device | |
GB1053189A (en) | ||
US5742188A (en) | Universal input data sampling circuit and method thereof | |
CA2014969C (en) | Delay circuit | |
KR940012158A (en) | Serial data communication method between microcomputers | |
US4453157A (en) | Bi-phase space code data signal reproducing circuit | |
KR950035185A (en) | Precoded Waveform Transmitter for Filtered Twisted Pair | |
US5933799A (en) | Noise eliminating bus receiver | |
US4285047A (en) | Digital adder circuit with a plurality of 1-bit adders and improved carry means | |
US5675271A (en) | Extended chip select reset apparatus and method | |
KR960032930A (en) | Data transfer circuit | |
US6633966B1 (en) | FIFO memory having reduced scale | |
EP0246355A2 (en) | Error and calibration pulse generator | |
US5572149A (en) | Clock regeneration circuit | |
SU1196838A1 (en) | Device for generating code sequences | |
JPH0370314A (en) | Clock disconnection detection circuit | |
RU2029988C1 (en) | Digital information input device | |
KR200245724Y1 (en) | A unit of abstracting 8K clock signal from a 64K clock signal | |
KR100248722B1 (en) | PCM data processing device of heterogeneous transmission and reception clock | |
SU1195433A1 (en) | Pulse sequence converter | |
KR100641914B1 (en) | Internal column address generator | |
KR970009749B1 (en) | Interrupt signal generation circuit for data matching between C, D, M, A terminal and mobile call simulator | |
SU947862A1 (en) | Error signal resistance device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PA0109 | Patent application |
Patent event code: PA01091R01D Comment text: Patent Application Patent event date: 19921113 |
|
A201 | Request for examination | ||
PA0201 | Request for examination |
Patent event code: PA02012R01D Patent event date: 19940208 Comment text: Request for Examination of Application Patent event code: PA02011R01I Patent event date: 19921113 Comment text: Patent Application |
|
PG1501 | Laying open of application | ||
E902 | Notification of reason for refusal | ||
PE0902 | Notice of grounds for rejection |
Comment text: Notification of reason for refusal Patent event date: 19960628 Patent event code: PE09021S01D |
|
G160 | Decision to publish patent application | ||
PG1605 | Publication of application before grant of patent |
Comment text: Decision on Publication of Application Patent event code: PG16051S01I Patent event date: 19961119 |
|
E701 | Decision to grant or registration of patent right | ||
PE0701 | Decision of registration |
Patent event code: PE07011S01D Comment text: Decision to Grant Registration Patent event date: 19970227 |
|
GRNT | Written decision to grant | ||
PR0701 | Registration of establishment |
Comment text: Registration of Establishment Patent event date: 19970411 Patent event code: PR07011E01D |
|
PR1002 | Payment of registration fee |
Payment date: 19970411 End annual number: 3 Start annual number: 1 |
|
FPAY | Annual fee payment |
Payment date: 19991130 Year of fee payment: 4 |
|
PR1001 | Payment of annual fee |
Payment date: 19991130 Start annual number: 4 End annual number: 4 |
|
LAPS | Lapse due to unpaid annual fee | ||
PC1903 | Unpaid annual fee |