KR940005261B1 - Frequency vertical control compensating circuit - Google Patents

Frequency vertical control compensating circuit Download PDF

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KR940005261B1
KR940005261B1 KR1019910023679A KR910023679A KR940005261B1 KR 940005261 B1 KR940005261 B1 KR 940005261B1 KR 1019910023679 A KR1019910023679 A KR 1019910023679A KR 910023679 A KR910023679 A KR 910023679A KR 940005261 B1 KR940005261 B1 KR 940005261B1
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South Korea
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vertical
frequency
voltage
vertical center
output
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KR1019910023679A
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Korean (ko)
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KR930015659A (en
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최종룡
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주식회사 금성사
이헌조
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
    • H04N3/227—Centering
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
    • H04N3/18—Generation of supply voltages, in combination with electron beam deflecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H2231/00—Applications
    • H01H2231/004—CRT

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

The frequency discrimination vertical center correcting circuit comprises a vertical center corrector for correcting a vertical center by adjusting the amount of direct currents to a vertical deflection current of a vertical output circuit; a frequency/voltage converter for converting a vertical frequency to a voltage; first and second comparators for comparing the output voltage of the frequency/voltage converter with setting voltages; and an analog switch portion for discriminating a vertical frequency by the outputs of the first and second comparators, operating setting variable resistors and supplying an adjusted voltage level to the vertical center corrector, thereby obtaining good quality of a monitor.

Description

주파수 판별 수직센터 보정회로Frequency discrimination vertical center correction circuit

제1도는 종래의 수직센터 보정 회로도.1 is a conventional vertical center correction circuit.

제2a도 내지 2b도는 종래에 따른 각부 파형도.2a to 2b is a conventional waveform diagram of each part.

제3도는 본 발명의 주파수 판별 수직센터 보정 회로도.3 is a frequency discrimination vertical center correction circuit diagram of the present invention.

제4도는 본 발명에 따른 수직주파수/전압의 특성 그래프.4 is a characteristic graph of vertical frequency / voltage according to the present invention.

제5도는 본 발명에 따른 아날로그 스위치 연결 특성표.5 is an analog switch connection characteristics table according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 수직출력부 2 : 수직센터 보정부1: vertical output unit 2: vertical center correction unit

3 : 주파수/전압 변환기 4, 5 : 제1, 2비교부3: frequency / voltage converter 4, 5: first and second comparison parts

6 : 아날로그 스위치부 R1-R8 : 저항6: analog switch R1-R8: resistance

VR1-VR4 : 가변저항 Q3, Q4 : 엔피엔 및 피엔피 트랜지스터VR1-VR4: Variable resistors Q3, Q4: Enp and PNP transistors

V-Dy : 수직편향코일 I1, I2 : 수직편향 전류V-Dy: Vertical deflection coil I1, I2: Vertical deflection current

i1, i2 : 직류전류 OP1, OP2 : 연산증폭기.i1, i2: DC current OP1, OP2: operational amplifier.

본 발명은 칼라브라운관 디스플레이 화면에 관한 것으로, 특히, 멀티모드 모니터에서 수직주파수가 다르기 때문에 칼라브라운관 화면의 수직센터가 다를 경우에 수직주파수를 판별하여 수직주파수가 다른 모드에서 수직센터를 각각 보정시켜 줄 수 있는데 적당하도록 한 주파수 판별 수직센터 보정회로에 관한 것이다.The present invention relates to a color CRT display screen. In particular, since the vertical frequency is different in a multi-mode monitor, when the vertical center of the color CRT screen is different, the vertical frequency is determined to correct the vertical centers in different modes. The present invention relates to a frequency discriminating vertical center compensating circuit so as to be suitable.

종래의 수직센터 보정회로는 제1도에 도시된 바와 같이, 수직 IC로부터 입력된 신호가 수직편향코일(V-Dy)과 콘덴서(C1) 및 접지저항(R1)을 통해 수직편향을 위한 신호로 출력되는 수직출력부(1)와, 수직출력부(1)에서 출력된 신호가 저항(R2) 및 접지콘덴서(C2)에 의해 평활된 후 베이스에 저항(R3), (R4)과 가변저항(VR1)을 통한 전원단자(Vcc)가 접속된 엔피엔 및 피엔피 트랜지스터(Q3), (Q4)의 공통 에미터에 인가되므로, 가변저항(VR1)의 조정에 따라 수직편향 전류(I1), (I2)에 직류전류(i1), (i2)가 가감되어서 수직편향 전류의 직류레벨이 이동되어 수직센터가 상/하로 조정되는 수직센터 보정부(2)로 구성된다.In the conventional vertical center correction circuit, as shown in FIG. 1, the signal input from the vertical IC is converted into a signal for vertical deflection through the vertical deflection coil V-Dy, the capacitor C1, and the ground resistor R1. The outputted vertical output unit 1 and the signal output from the vertical output unit 1 are smoothed by the resistor R2 and the ground capacitor C2, and then the resistors R3, R4 and the variable resistor ( Since the power supply terminal Vcc through the VR1 is applied to the common emitters of the NP and PN transistors Q3 and Q4 connected thereto, the vertical deflection currents I1 and (according to the adjustment of the variable resistor VR1). DC currents i1 and i2 are added to and subtracted from I2), and the direct current level of the vertical deflection current is shifted so that the vertical center is adjusted up and down.

이와 같이 구성된 종래의 기술동작은 제2도의 파형도를 참조해 설명하면 다음과 같다.The conventional technical operation configured as described above will be described below with reference to the waveform diagram of FIG.

먼저, 제2a도와 같이 수직 IC로부터 입출력되는 수직편향 전류(I1), (I2)가 같을 때, 그 수직편향 전류(I1), (I2)의 직류레벨을 이동시켜 수직화면 라스터를 상/하 위치로 이동시키기 위한 직류전류(i1), (i2)를 수직편향 전류(I1), (I2)에 인가시키기 위한 수직센터 보정부(2)에서는 전원전압(Vcc)이 저항(R3), (R4) 및 가변저항(VR1)에 의해 엔피엔 및 피엔피 트랜지스터(Q3), (Q4)의 베이스 구동전압으로 인가되므로, 가변저항(VR1)을 동작시켜 가변저항(VR1)이 저항(R3) 위치쪽으로 갈 때, 엔피엔 트랜지스터(Q3)의 베이스 전압이 수직 IC 전원에 의해 전압크기가 되는 엔피엔 트랜지스터(Q3)의 에미터 전압보다 높게 되어 엔피엔 트랜지스터(Q3)가 온되고, 동시에 피엔피 트랜지스터(Q4)가 오프되어 직류전류(i1)가 흘러서 제2b도와 같이 수직편향 전류(I1)에 직류전류(i1)가 가해져서, 수직편향 전류의 직류레벨이 이동되어 수직센터가 위로 움직이게 된다.First, when the vertical deflection currents I1 and I2 input and output from the vertical IC are the same as in FIG. 2A, the DC level of the vertical deflection currents I1 and I2 is moved to move the vertical screen raster up / down. In the vertical center compensator 2 for applying the direct currents i1 and i2 for moving to the position to the vertical deflection currents I1 and I2, the power supply voltage Vcc is represented by the resistors R3 and R4. ) And the variable resistor VR1 are applied to the base driving voltages of the NP and PNP transistors Q3 and Q4, so that the variable resistor VR1 is operated toward the resistor R3 position by operating the variable resistor VR1. In this case, the base voltage of the NP transistor Q3 is higher than the emitter voltage of the NP transistor Q3 which becomes a voltage level by the vertical IC power supply, so that the NP transistor Q3 is turned on, and at the same time, the PN transistor ( Q4) is turned off so that the DC current i1 flows so that the DC current i1 is applied to the vertical deflection current I1 as shown in FIG. The DC level of the vertical deflection current is shifted to move the vertical center upward.

반면에 가변저항(VR1)이 저항(R4) 위치쪽으로 갈 때 엔피엔 트랜지스터(Q3)는 오프되고, 피엔피 트랜지스터(Q4)가 온되어 직류전류(i2)가 흘러서 제2b도와 같이 수직편향 전류(I2)에 직류전류(i2)가 가해져서 수직편향 전류의 레벨이 이동되어 수직센터가 아래로 움직인다.On the other hand, when the variable resistor VR1 goes to the position of the resistor R4, the NP transistor Q3 is turned off, the PN transistor Q4 is turned on so that the DC current i2 flows, and as shown in FIG. DC current i2 is applied to I2) to shift the level of the vertical deflection current so that the vertical center moves downward.

그러나, 이와 같은 종래의 수직센터 보정회로는 멀티모드 모니터에서 수직센터 보정을 가변저항 한개로 보정하기 때문에 수직주파수가 다를 경우의 칼라브라운관 화면의 수직센터 보정을 모두 만족시켜 줄 수 없어서, 수직주파수가 다른 모드에서 수직센터 위치가 다르게 되는 문제점이 있었다.However, such a conventional vertical center correction circuit corrects vertical center correction with a single variable resistor in a multi-mode monitor, so that vertical center correction of a color CRT screen when the vertical frequency is different cannot be satisfied. There was a problem in that the vertical center position was different in different modes.

본 발명은 이와 같은 종래의 문제점을 해결하기 위하여 멀티모드 모니터에서 수직주파수를 전압으로 변환시켜 설정된 기준전압과 비교하여 판별한 다음 그 판별된 값에 의해 수직주파수 별로 수직센터를 보정시켜 줄 수 있도록 한 주파수 판별 수직센터 보정회로를 창안한 것으로, 이를 첨부한 도면을 참조해 설명하면 다음과 같다.In order to solve the conventional problem, the present invention provides a method for converting a vertical frequency into a voltage in a multi-mode monitor, comparing the set voltage with a reference voltage, and then correcting the vertical center for each vertical frequency by the determined value. Invented a frequency discrimination vertical center correction circuit, which will be described below with reference to the accompanying drawings.

제3도는 본 발명의 주파수 판별 수직센터 보정회로도로서 이에 도시한 바와 같이 수직 IC로부터 입력된 신호를 수직편향코일(V-Dy)과 콘덴서(C1) 및 접지저항(R1)에 의해 수직편향을 위한 수직편향 전류로 출력시키는 수직출력부(1)와, 엔피엔 및 피엔피 트랜지스터(Q3), (Q4)의 베이스에 저항(R3)을 통해 인가되는 전압(Vcc) 레벨을 수직주파수 판별에 따라 다르게 하여 상기 수직출력부(1)의 수직편향 전류에 직류전류량을 조정하여 수직센터를 보정시키는 수직센터 보정부(2)와, 수직동기신호(V-SYNC)의 주파수를 전압으로 변환시켜 출력하는 주파수/전압 변환기(3)와, 상기 주파수/전압 변환기(3)로부터 출력되는 전압을 각각 연산증폭기(OP1), (OP2)에서 저항(R5), (R6)에 의해 설정된 기준전압(Va)과 저항(R1), (R8)에 의해 설정된 기준전압(Vb)으로 비교 출력하는 제1, 2비교부(4), (5)와, 상기 제1, 2비교부(4), (5)에서 비교된 출력전압(Ao), (A1)에 따라 가동단자(Zo)가 각각의 고정단자(Yo, Y2, Y3)에 스위칭됨에 따라, 각각 경우에 가변저항( VR2, VR3, VR4)이 상기 수직센터 보정부(2)의 저항(R3)과 연결되어 그 저항(R3) 및 가변저항(VR2, VR3, VR4)에 의해 각각 분배된 전압레벨을 조정하여 상기 수직센터 보정부(2)가 동작되게 하여 수직센터를 수직주파수에 따라 각각 보정시켜 주는 아날로그 스위치부(6)로 구성한다.FIG. 3 is a frequency discrimination vertical center correction circuit of the present invention, as shown in FIG. 3, for vertical deflection of a signal input from a vertical IC by a vertical deflection coil V-Dy, a capacitor C1, and a ground resistor R1. The voltage Vcc level applied through the resistor R3 to the bases of the vertical output unit 1 for outputting the vertical deflection current and the NP and PNP transistors Q3 and Q4 varies according to the vertical frequency discrimination. To adjust the DC current amount to the vertical deflection current of the vertical output unit 1 to correct the vertical center, and to convert the frequency of the vertical synchronous signal V-SYNC into a voltage. The voltage output from the voltage converter 3 and the voltage converter 3 and the reference voltage Va and the resistor set by the resistors R5 and R6 at the operational amplifiers OP1 and OP2, respectively. First and second comparisons for comparative output at the reference voltage Vb set by (R1) and (R8) According to the output voltages (Ao) and (A1) compared with (4) and (5) and the first and second comparison parts (4) and (5), the movable terminals Zo are respectively fixed terminals Yo, As switched to Y2 and Y3, in each case, the variable resistors VR2, VR3 and VR4 are connected to the resistor R3 of the vertical center compensator 2 so that the resistor R3 and the variable resistors VR2 and VR3 are respectively connected. And analog switch unit 6 for adjusting the voltage levels respectively distributed by VR4 to operate the vertical center correction unit 2 to correct the vertical center according to the vertical frequency.

이와 같이 구성한 본 발명의 작용 및 효과를 제4도와 제5도를 참조해 설명하면 다음과 같다.The operation and effects of the present invention configured as described above will be described with reference to FIGS. 4 and 5.

본 발명은 수직주파수를 판별하여 수직센터 보정부(2)의 엔피엔 및 피엔피 트랜지스터(Q3), (Q4)의 베이스 전압을 다르게 조정해서 수직출력부(1)의 수직편향 전류를 이동시켜 수직센터를 보정해주기 위한 것이다. 즉, 수직동기신호(V-SYNC)를 주파수/전압 변환기(3)에 입력시켜 제4도와 같이 수직주파수에 비례해서 출력되는 전압을 연산증폭기(OP1), (OP2)의 비반전단자(+)에 각각 입력시키고, 아울러 상기 연산증폭기(OP1)의 반전단자(-)에는 저항(R5), (R6)으로 분배된 저항(Va)이 즉, 수직주파수 55Hz에 해당하는 F/V 전압이 인가되게 하며, 상기 연산증폭기(OP2)의 반전단자(-)에는 저항(R7), (R8)으로 분배된 전압(Vb)이 즉, 수직주파수 65Hz에 해당하는 F/V 전압을 인가하게 할 때, 그 연산증폭기(OP1), (OP2)의 출력(Ao), (A1)이 F/V 전압과 설정전압(Va), (Vb)을 비교하면 제5도와 같이 나타낼 수 있다.The present invention determines the vertical frequency and adjusts the base voltages of the ENP and PNP transistors Q3 and Q4 of the vertical center compensator 2 differently to move the vertical deflection current of the vertical output part 1 to move the vertical voltage. To calibrate the center. That is, the non-inverting terminal (+) of the operational amplifiers OP1 and OP2 converts the voltage outputted in proportion to the vertical frequency by inputting the vertical synchronization signal V-SYNC to the frequency / voltage converter 3 as shown in FIG. Are respectively inputted to the inverting terminal (-) of the operational amplifier OP1 so that the resistors (Va) distributed by the resistors (R5) and (R6) are applied, that is, the F / V voltage corresponding to the vertical frequency of 55 Hz is applied. When the voltage Vb divided by the resistors R7 and R8 is applied to the inverting terminal (-) of the operational amplifier OP2, that is, an F / V voltage corresponding to a vertical frequency of 65 Hz, The outputs Ao and A1 of the operational amplifiers OP1 and OP2 compare the F / V voltage with the set voltages Va and Vb as shown in FIG. 5.

즉, 수직주파수 50Hz에서 연산증폭기(OP1), (OP2)의 출력(Ao), (A1)이 모두 로울레벨(L)이 출력되어 아날로그 스위치부(6)에 입력될 때, 그 아날로그 스위치부(6)의 채널연결은 Zo-Yo가 되어 가변저항(VR2)만 연결시켜 동작하므로 상기 저항(R3)과 가변저항(VR2)으로써 상기 엔피엔 및 피엔피 트랜지스터(Q3), (Q4)의 베이스 전압이 조정 가능하다.That is, when the output amplifiers AO and A1 of the operational amplifiers OP1 and OP2 are all output at the vertical frequency 50 Hz and the low level L is output to the analog switch unit 6, the analog switch unit ( Since the channel connection of 6) is Zo-Yo and operates by connecting only the variable resistor VR2, the base voltages of the ENP and PNP transistors Q3 and Q4 are provided as the resistor R3 and the variable resistor VR2. This is adjustable.

또한, 수직주파수 60Hz에서는 비교된 출력(Ao), (A1)이 각각 하이 및 로울레벨이 되므로 상기 아날로그스위치부(6)의 채널연결이 Zo-Y2가 되어 가변저항(VR3)이 동작하고, 수직주파수 70Hz에서는 비교된 출력(Ao), (A1)이 모두 하이레벨이 되므로 상기 아날로그 스위치부(6)의 동작특성에 의해 채널연결이 Zo-Y3가 되어 가변저항(VR4)이 동작한다.In addition, at the vertical frequency of 60 Hz, the outputs Ao and A1 become high and low levels, respectively, so that the channel connection of the analog switch unit 6 becomes Zo-Y2 and the variable resistor VR3 operates. At a frequency of 70 Hz, the outputs Ao and A1 are all at a high level, so that the channel connection is Zo-Y3 due to the operating characteristics of the analog switch unit 6 and the variable resistor VR4 operates.

따라서, 수직주파수 50Hz에서는 저항(R3) 및 가변저항(VR2)으로, 수직주파수 60Hz에서는 저항(R3) 및 가변저항(VR3)으로, 수직주파수 70Hz 에서는 저항(R3) 및 가변저항(VR4)으로 상기 수직센터 보정부(2)의 엔피엔 및 피엔피 트랜지스터(Q3), (Q4)의 베이스 전압을 수직주파수별로 각각 조정하므로 직류전류(i1), (i2)가 조정되어 수직센터를 보정시켜 주게 된다.Therefore, the resistor R3 and the variable resistor VR2 at the vertical frequency 50 Hz, the resistor R3 and the variable resistor VR3 at the vertical frequency 60 Hz, and the resistor R3 and the variable resistor VR4 at the vertical frequency 70 Hz. Since the base voltages of the ENP and PNP transistors Q3 and Q4 of the vertical center correction unit 2 are adjusted for each vertical frequency, the DC currents i1 and i2 are adjusted to correct the vertical center. .

이상에서 상세히 설명한 바와 같이 본 발명은 멀티모드 모니터에서 수직주파수를 판별하여 그 수직주파수에 따른 직류전류량을 조정하므로, 수직주파수별로 칼라브라운관 면의 수직센터 보정을 모두 만족시켜 줄수 있어서 화면품질을 높이는 효과가 있게 된다.As described in detail above, the present invention adjusts the amount of DC current according to the vertical frequency by determining the vertical frequency in the multi-mode monitor, thereby satisfying the vertical center correction of the color-brown tube surface for each vertical frequency, thereby improving the screen quality. Will be.

Claims (1)

수직출력부(1)의 수직편향 전류에 인가되는 직류전류(i1), (i2)를 수직주파수별로 조정하여 수직센터를 보정시키는 수직센터 보정부(2)와, 수직주파수를 전압으로 변환시켜 출력하는 주파수/전압 변환기(3)와, 상기 주파수/전압 변환기(3)에서 출력된 전압을 각각 설정된 전압(Va), (Vb)과 비교하여 출력되게 하는 제1, 2비교부(4), (5)와, 상기 제1, 2비교부(4), (5)에서 비교된 출력전압(Ao), (A1)에 의해 수직주파수를 판별하여 각각 설정된 가변저항(VR2-VR4)을 동작시켜서 상기 수직센터 보정부(3)에 조정된 전압레벨이 인가되게 하는 아날로그 스위치부(6)로 구성함을 특징으로 하는 주파수 판별 수직센터 보정회로.Vertical center correction unit 2 for correcting vertical center by adjusting DC currents i1 and i2 applied to the vertical deflection current of the vertical output unit 1 for each vertical frequency, and converting the vertical frequency into voltage and outputting the voltage. The first and second comparison units 4 and (2) for comparing the voltage output from the frequency / voltage converter 3 and the voltage output from the frequency / voltage converter 3 with the set voltages Va and Vb. 5), the vertical frequency is discriminated by the output voltages Ao and A1 compared in the first and second comparison units 4 and 5, and the variable resistors VR2-VR4 respectively set are operated. And an analog switch unit (6) for applying the adjusted voltage level to the vertical center corrector (3).
KR1019910023679A 1991-12-20 1991-12-20 Frequency vertical control compensating circuit KR940005261B1 (en)

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KR930015659A KR930015659A (en) 1993-07-24
KR940005261B1 true KR940005261B1 (en) 1994-06-15

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