KR940003495Y1 - Rom emulator - Google Patents
Rom emulator Download PDFInfo
- Publication number
- KR940003495Y1 KR940003495Y1 KR2019890003890U KR890003890U KR940003495Y1 KR 940003495 Y1 KR940003495 Y1 KR 940003495Y1 KR 2019890003890 U KR2019890003890 U KR 2019890003890U KR 890003890 U KR890003890 U KR 890003890U KR 940003495 Y1 KR940003495 Y1 KR 940003495Y1
- Authority
- KR
- South Korea
- Prior art keywords
- rom
- ram
- system board
- software
- buffer
- Prior art date
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Debugging And Monitoring (AREA)
- Stored Programmes (AREA)
- Test And Diagnosis Of Digital Computers (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안 장치의 회로도.1 is a circuit diagram of the device of the present invention.
제2도는 본 고안 장치의 실시 상태도.2 is an embodiment of the present invention device.
제3도는 본 고안 장치의 작동 상태도.3 is an operating state diagram of the device of the present invention.
제4도는 종래 EPROM을 이용한 프로그램 개발 유통도.4 is a program development distribution diagram using a conventional EPROM.
본 고안은 컴퓨터의 하드웨어 설계시에 또는 소프트웨어 설계시에 사용되는 ROM 에뮬레이터(EMULATOR)장치에 관한 것으로서 특히, 인터페이스, CPM, RAM, 버퍼 등을 설치하여 ROM 대신에 사용할 수 있는 ROM 에뮬레이터 장치에 관한 것이다.The present invention relates to a ROM emulator device used for hardware design or software design of a computer. More particularly, the present invention relates to a ROM emulator device that can be used in place of a ROM by installing an interface, a CPM, a RAM, and a buffer. .
종래에는 소프트웨어의 개발시에는 제4도와 같이 우선 개발된 소프트웨어의 정보를 불휘발성 메모리인 EPROM에 기억시켜놓고, 개발된 소프트웨어를 시험한후 에러가 발생되면 EPROM에 기록된 소프트웨어의 정보를 자외선으로 소거한 다음 소프트웨어를 다시 개발하여 EPROM에 새롭게 개발된 소프트 웨어의 정보를 기억시켜 다시 시험가동하여 에러발생 여부를 검사하도록 하고 있으나, 이러한 작업을 반복하는 경우에도 소거 및 기록에 많은 시간이 필요하게 될뿐 아니라, EPROM을 소거하기 위하여 자외선을 반복사용하게 되므로 EPROM의 노후화를 발생시 EPROM 자체 불량이 발생되는 단점이 있다. 더우기, 시스템 보드 설계중 프로세서가 동작하기 위해 펌웨어(F/W : 명령어)를 저장하는 불휘발성 메모리(ROM)률 사용하는 F/W의 개발이 확정, 완료되지 않아 내용수정 변경하기 위하여 ROM 내용을 수정할 때마다 소거작업과 재기록 작업을 반복실시하여야 하는 단점이 있다.Conventionally, when developing the software, the information of the developed software is first stored in the EPROM, which is a nonvolatile memory as shown in FIG. 4, and when the developed software is tested, the information of the software recorded in the EPROM is erased by ultraviolet rays when an error occurs. The next software is re-developed to store the information of newly developed software in the EPROM to test again to check for errors.However, even if this operation is repeated, a lot of time is required for erasing and writing. Because UV rays are repeatedly used to erase the EPROM, the EPROM itself may be defective when the EPROM is aged. Moreover, the development of F / W using nonvolatile memory (ROM) rate that stores firmware (F / W: instruction) for the processor to operate during system board design is not finalized. There is a disadvantage in that the erase operation and the rewrite operation must be repeated each time it is corrected.
본 고안은 이러한 종래의 단점을 해결하기 위하여 컴퓨터와 같은 소프트웨어의 개발장비에서의 정보를 수신하기 위한 RS232C 인터페이스, CPU, ROM 및 버퍼등을 설치하여 일단 개발된 소프트웨어의 정보를 RAM에 기억시키고 버퍼를 통하여 RAM의 기억내용을 시스템 보드로 출력시켜 ROM에서 데이타가 나오는 것처럼 효과를 나타낼 수 있어, 소거 및 기록작업이 간편하고 신속하게 이루어질 수 있는 ROM 에뮬레이터 장치를 제공하는 것을 목적으로 하며, 이하 첨부된 도면을 참조하면서 본 고안 장치의 구성 및 작용효과를 설명하면 다음과 같다.The present invention installs RS232C interface, CPU, ROM and buffer for receiving information from software development equipment such as computer to solve the above shortcomings. It is an object of the present invention to provide a ROM emulator device which can output the memory contents of the RAM to the system board and have an effect as if data comes out from the ROM, so that erase and write operations can be easily and quickly performed. Referring to the configuration and effect of the device of the present invention with reference to.
제1도를 참조하면 본 고안 장치는 컴퓨터와 같은 공지의 개발장치(1)의 출력을 RS232C 인터페이스(2)의 입력에 연결하고, RS232C 인터페이스(2)의 출력은 CPU(3)를 통하여 RAM(4)에 연결하며, RAM(4)의 입력(1,0)은 각각 버퍼(5,6)를 공지의 시스템보드(7)에 연결하여된 구성으로서 이러한 구성의 본 고안 장치의 작용효과를 제2도 및 제3도를 참조하여 설명하면, 우선 제2도를 참조하면 본 고안 장치의 RS232C 인터페이스(2)에는 공지의 개발장치(1)의 출력이 RS232C소켓(11)을 통하여 접속되고 버퍼(5,6)의 입출력은 ROM과 동일한 핀배열을 갖는 소켓(12)을 통하여 공지의 시스템 보드(7)에서 ROM의 위치에 꼽아 본 고안 장치를 공지의 개발장치(1)와 시스템보드(7)에 연결한다.Referring to FIG. 1, the inventive device connects the output of a known development apparatus 1, such as a computer, to the input of an RS232C interface 2, and the output of the RS232C interface 2 is connected to a RAM (through the CPU 3). 4), and the inputs (1,0) of the RAM (4) are configured by connecting the buffers (5, 6) to the known system board (7), respectively, to reduce the operational effects of the device of this invention. Referring to FIG. 2 and FIG. 3, first, referring to FIG. 2, the output of a well-known development apparatus 1 is connected to the RS232C interface 2 of the apparatus of the present invention through the RS232C socket 11, and the buffer ( Input and output of the 5,6 is plugged into the position of the ROM in the known system board (7) through the socket 12 having the same pin arrangement as the ROM, the device of the present invention known development apparatus (1) and system board (7) Connect to
제3도를 참조하면 우선, 공지의 개발장치(1)에서 새롭게 개발된 S/W(소프트웨어)의 정보는 RS232C 인터페이스(2)를 통하여 수신되어 RAM(4)에 수신된 S/W 정보데이타를 기록하고, S/W 정보데이타의 RAM(4) 기록이 완료되었는가를 검사하여 기록이 완료되었으면 RAM 메모리 내용을 버퍼(6)를 통하여 공지의 시스템 보드(7)에 공급시키고, 시스템보드(7)에서 RAM 메모리 내용에 따른 즉, 소프트웨어에 따른 응답정보 등은 버퍼(5)를 통하여 RAM(4)에 인가된다.Referring to FIG. 3, first, information of a newly developed S / W (software) in the known development apparatus 1 is received through the RS232C interface 2 to receive the S / W information data received in the RAM 4. It records and checks whether the RAM 4 recording of the S / W information data is completed. When the recording is completed, the contents of the RAM memory are supplied to the known system board 7 through the buffer 6, and the system board 7 In response to the contents of the RAM memory, that is, the response information according to the software, etc. are applied to the RAM 4 through the buffer 5.
따라서 ROM 대신에 RAM을 이용하여 시스템 보드(7)내에서 ROM을 적용할 곳에 ROM 소켓을 꼽아 시스템 보드(7)내의 CPU에 팜웨어(F/W)를 공급하므로서 F/W 내용을 시험할 수 있다.Therefore, you can test the F / W contents by supplying Palmware (F / W) to the CPU in the system board 7 by inserting the ROM socket where the ROM is to be applied in the system board 7 using the RAM instead of the ROM. have.
이상태에서 에러가 발생된다면 제2도에서 즉시 개발장치(1)의 모니터 화면에 나타나므로 개발자는 손쉽게 S/W나 F/W를 정정하여 다시 시험할 수 있다.If an error occurs in this state, it immediately appears on the monitor screen of the development apparatus 1 in FIG. 2, so that the developer can easily test again by correcting S / W or F / W.
이상에서 설명된 바와같이 본 고안 장치에 의하면 S/W나 F/W의 개발시간이 크게 단축될 뿐 아나라 그 사용이 편리한 것이다.As described above, according to the device of the present invention, the development time of S / W or F / W is greatly shortened, but it is convenient to use.
Claims (1)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019890003890U KR940003495Y1 (en) | 1989-03-31 | 1989-03-31 | Rom emulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019890003890U KR940003495Y1 (en) | 1989-03-31 | 1989-03-31 | Rom emulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR900017598U KR900017598U (en) | 1990-10-05 |
| KR940003495Y1 true KR940003495Y1 (en) | 1994-05-25 |
Family
ID=19284828
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019890003890U KR940003495Y1 (en) | 1989-03-31 | 1989-03-31 | Rom emulator |
Country Status (1)
| Country | Link |
|---|---|
| KR (1) | KR940003495Y1 (en) |
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1989
- 1989-03-31 KR KR2019890003890U patent/KR940003495Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR900017598U (en) | 1990-10-05 |
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