KR940003035Y1 - Horizontal size control circuit - Google Patents
Horizontal size control circuit Download PDFInfo
- Publication number
- KR940003035Y1 KR940003035Y1 KR2019880019276U KR880019276U KR940003035Y1 KR 940003035 Y1 KR940003035 Y1 KR 940003035Y1 KR 2019880019276 U KR2019880019276 U KR 2019880019276U KR 880019276 U KR880019276 U KR 880019276U KR 940003035 Y1 KR940003035 Y1 KR 940003035Y1
- Authority
- KR
- South Korea
- Prior art keywords
- transistor
- horizontal
- horizontal size
- coil
- capacitor
- Prior art date
Links
- 239000003990 capacitor Substances 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/04—Deflection circuits ; Constructional details not otherwise provided for
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
- H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
- H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections
- H04N3/22—Circuits for controlling dimensions, shape or centering of picture on screen
- H04N3/223—Controlling dimensions
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
- G09G2340/0421—Horizontal resolution change
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Details Of Television Scanning (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 회로도.1 is a circuit diagram of the present invention.
제2도는 종래의 회로도.2 is a conventional circuit diagram.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 펄스폭 발생기 2 : FBT1: pulse width generator 2: FBT
C1-C4: 콘덴서 D1-D3: 다이오드C 1 -C 4 : Capacitor D 1 -D 3 : Diode
L1: 수평편향코일 L2: 수평리니어러티코일L 1 : Horizontal deflection coil L 2 : Horizontal linearity coil
L3: 쵸크코일 Q1-Q3: 트랜지스터L 3 : Choke Coil Q 1 -Q 3 : Transistor
R1-R6: 저항R 1 -R 6 : resistance
본 고안은 CTR 디스플레이에 있어서 수평사이즈 조절회로에 관한 것으로, 특히 펄스폭 발생기를 이용하여 수평사이즈를 조절하게 한 것이다.The present invention relates to a horizontal size adjusting circuit in a CTR display, and in particular, to adjust the horizontal size using a pulse width generator.
종래에는 제2도에 도시된 바와같이 수평출력 신호 입력단(S1)에 트랜지스터(Q1)를 통하여 FBT(2)와 콘덴서(C1)를 접속하고 이들의 접점에 수평편향코일(L1)과 수평사이즈 코일(L2)그리고 수평 리니어러티(Linearty)코일(L3)을 통하여 접지 콘덴서(C2)를 접속하였다.Conventionally, as shown in FIG. 2, the FBT 2 and the capacitor C 1 are connected to the horizontal output signal input terminal S 1 through the transistor Q 1 , and the horizontal deflection coil L 1 is connected to these contacts. And ground capacitor C 2 were connected to each other via the horizontal size coil L 2 and the horizontal linear coil L 3 .
이와같이 구성된 종래의 수평사이즈 조절회로에 있어서는 트랜지스터(Q1)의 베이스에 수평출력신호가 입력되면 트랜지스터(Q1)가 온되었고, 이에따라 FBT(2)에서는 일정한 고압을 발생시켜 콘덴서(C1)가 충방전이 되게 하였으며, 수평편향코일(L1)을 통하여 편향전류가 흘러 수평사이즈코일(L2)로 요구하는 수평 사이즈를 조절하게 하였다.Thus in the conventional horizontal size adjustment circuit configured when the horizontal output signal is input to the base of the transistor (Q 1) were the transistor (Q 1) on, yiettara FBT (2) The by generating a predetermined high voltage capacitor (C 1) is Charge and discharge were made, and a deflection current flowed through the horizontal deflection coil (L 1 ) to adjust the horizontal size required by the horizontal size coil (L 2 ).
그러나 이러한 종래의 회로에 있어서는 수평사이즈코일(L2)을 이용하여 수평사이즈를 외부에서 수동으로 크게 또는 작게 조절해야 하는 불편이 있었으며, 수평사이즈코일(L2)을 사용하므로 수평사이즈코일(L2)에 전류가 흘러 열이 발생하면 회로의 다른 소자에 열을 전달시켜 회로소자를 파손시키게 되는 결점이 있었다.However, in such a conventional circuit, the horizontal size coil L 2 has a disadvantage in that the horizontal size is manually adjusted large or small from the outside, and the horizontal size coil L 2 is used, so the horizontal size coil L 2 is used. When heat is generated by current flow, heat transfers to other devices in the circuit, which damages the circuit.
본 고안은 이와같은 종래의 결점을 감안하여 안출한 것으로, 이를 첨부된 도면 제1도에 의하여 상세히 설명하면 다음과 같다.The present invention has been devised in view of the above conventional drawbacks, which will be described in detail with reference to FIG.
수평출력신호 입력단(S1)에 트랜지스터(Q1)를 통하여 FBT(2)가 접속되게 콘덴서(C1)(C2)와 다이오드(D1)(D2)를 병렬 접속시켜 접지시키고, 상기 다이오드(D1)의 양단 사이에는 수평 편향코일(L1)과 수평 리니어러티 코일(L2) 그리고 콘덴서(C4)를 직렬 접속시킨 후 쵸크코일(L3)을 통하여 에미터가 저항(R6)을 통해 접지된 트랜지스터(Q3)의 컬렉터를 접속시킨다.The capacitor C1 and C2 and the diode D1 and D2 are connected in parallel so as to be connected to the horizontal output signal input terminal S 1 via the transistor Q 1 , and grounded. The horizontal deflection coil (L 1 ), the horizontal linearity coil (L 2 ), and the condenser (C 4 ) are connected in series between the two ends of the emitter, and the emitter is grounded through the resistor (R 6 ) through the choke coil (L 3 ). The collector of the transistor Q 3 is connected.
또한, 펄스폭 발생기(1)에 다이오드(D3)와 저항(R2)을 통해 에미터가 상기 트랜지스터(Q3)의 베이스에 접속된 트랜지스터(Q2)의 베이스를 접속시킴과 아울러 B+가 저항(R1)(R3)(R5)을 통하여 트랜지스터(Q2)(Q3)의 각 베이스와 컬렉터에 인가되도록 접속시켜서 구성된 것이다.In addition, the emitter is connected to the base of the transistor Q 2 connected to the base of the transistor Q 3 through the diode D 3 and the resistor R 2 to the pulse width generator 1, and B +. Is connected to each base and the collector of transistors Q 2 and Q 3 via resistors R 1 , R 3 , and R 5 .
이와같이 접속된 본고안은 수평출력신호가 입력되면 트랜지스터(Q1)가 온되어 수평편향코일(L1)과 수평리니어러티코일(L2)을 통하여 편향 전류가 흐르며, 이때 콘덴서(C1)(C2)의 분할비에 의하여 A점에 DC전압이 공급된다.Thus the present connection devise is when the horizontal output signal is input to the transistor (Q 1) is turned on flows through the deflection current through the horizontal deflection coil (L 1) and a horizontal linear multiple Tycho one (L 2), wherein the capacitor (C 1) The DC voltage is supplied to point A by the division ratio of (C 2 ).
이때, 펄스폭 발생기(1)에서 거형파형이 다이오드(D3)의 캐소우드에 인가될 경우 저역필터 회로인 저항(R2)과 콘덴서(C3)의 시정수에 의해 저역필터가 되고 트랜지스터(Q2)의 베이스 전압은 인가된 펄스폭에 의해 변한다.At this time, when the large waveform is applied to the cathode of the diode D 3 in the pulse width generator 1, the low pass filter is formed by the time constants of the resistor R 2 and the capacitor C 3 , which are low-pass filter circuits, and the transistor ( The base voltage of Q 2 ) changes with the pulse width applied.
이와같이 트랜지스터(Q2)의 베이스 전압이 변하면 트랜지스터(Q3)의 베이스 전압과 컬렉터 전압도 변하므로 이에 따라 편향 전류도 변하여 수평사이즈를 조절할 수 있다.As such, when the base voltage of the transistor Q 2 changes, the base voltage and the collector voltage of the transistor Q 3 also change, so that the deflection current may change accordingly to adjust the horizontal size.
만일, 트랜지스터(Q2)의 베이스 전위가 낮아지면 트랜지스터(Q3)의 베이스 전위도 낮아지므로 트랜지스터(Q3)의 내부 임피던스가 높아져 컬렉터의 전위가 높아지고 편향전류가 감소하여 수평 사이즈가 적어지며 이와 반대로 트랜지스터(Q2)의 베이스 전위가 높아지면 상기와 반대로 회로가 동작하여 수평 사이즈가 커지므로 이와같은 방식에 의하여 수평사이즈를 조절할 수 있다.If the base potential of the transistor Q 2 is lowered, the base potential of the transistor Q 3 is also lowered, so that the internal impedance of the transistor Q 3 is increased, the potential of the collector is increased, the deflection current is reduced, and the horizontal size is reduced. On the contrary, when the base potential of the transistor Q 2 is increased, the circuit operates in the opposite manner to the above, so that the horizontal size can be adjusted in this manner.
이상과 같은 본 고안은 펄스폭 발생기(1)에서 펄스폭을 설정하여 펄스를 인가할 경우에 외부에서 수동으로 수평사이즈를 조절할 필요가 없이 자동으로 펄스폭에 의해서 DC전위를 가변시켜 수평 사이즈를 용이하게 조절할 수 있는 유익한 특징이 있는 것이다.The present invention as described above, when the pulse width is set in the pulse width generator 1, when the pulse is applied, there is no need to manually adjust the horizontal size from the outside, thereby automatically changing the DC potential by the pulse width to facilitate the horizontal size. There is a beneficial feature that can be adjusted.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019880019276U KR940003035Y1 (en) | 1988-11-29 | 1988-11-29 | Horizontal size control circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019880019276U KR940003035Y1 (en) | 1988-11-29 | 1988-11-29 | Horizontal size control circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR900011073U KR900011073U (en) | 1990-06-04 |
KR940003035Y1 true KR940003035Y1 (en) | 1994-05-11 |
Family
ID=19281649
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019880019276U KR940003035Y1 (en) | 1988-11-29 | 1988-11-29 | Horizontal size control circuit |
Country Status (1)
Country | Link |
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KR (1) | KR940003035Y1 (en) |
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1988
- 1988-11-29 KR KR2019880019276U patent/KR940003035Y1/en not_active IP Right Cessation
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Publication number | Publication date |
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KR900011073U (en) | 1990-06-04 |
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