KR800000116B1 - Circuit arrangement for generating a fifld defelction current - Google Patents

Abstract

A generator cct. of deflection current, which can be used in TV, had a cct. of field output stage which is provided with feedback loop of AC current, so that audio frequency oscillation and overshoot at the vertical deflection cct. are prevented, and linearity error at the deflection cct. is compensated. Parabolical waveform signal is supplied to the field output stage through the loop, and clamping cct. of field frequency is included in the loop, and a distortion of the parabolical waveform signal thus is reduced.

Description

Vertical deflection current generating circuit device

1 is a known circuit device

2 and 3 show waveforms generated by the circuit arrangement of FIG.

4 is a more complete embodiment of the circuit arrangement of FIG.

5, 6, 7, 8, and 9 show embodiments of the circuit arrangement according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit arrangement for generating a sawtooth deflection current in a vertical deflection coil of a television receiver, which includes a generator, which supplies a sawtooth control signal to a first input terminal of the amplifier. Has an output terminal coupled to the deflection coil, and has at least one second input terminal for coupling the path environment for low frequency and the path environment for high frequency.

This circuit arrangement is known from U.S. Patent No. 3,434,004 (PHN1254), where the connection terminal of the deflection coil on the side not connected to the output terminal of the amplifier is connected through a series device of a capacitor with a large capacity and a low resistance. Grounded. The capacitor is needed because the populating strength of the deflection current must be substantially zero. Without a capacitor, the amplifier would be cumbersome and expensive because it would have to be supplied from two voltage sources of opposite polarity. The voltage fed back to the input of the amplifier for DC and AC currents is generated across the series described above. DC current feedback stabilizes the average current of the amplifier, while AC current feedback allows the deflection current to have the desired change. These networks with large feedbacks result in the following: the frequency characteristic of the amplifier peaks at frequencies much lower than the feed frequency of 50 or 60 Hz. When the DC component of the control signal supplied to the amplifier suddenly changes, for example, when the amplitude or frequency of the signal changes, overshoot or damped low frequency oscillation occurs in the deflection current. Then, the image that appears on the screen of the hall moves up and down quickly, which is very difficult.

Similar effects are shown in the above patents, where the frequency characteristics at very low frequencies are rapidly attenuated. In order to obtain satisfactory linearity of the deflection current, the control signal must have a very low frequency component since the parabolic component is added to the sawtooth waveform component.

The drawbacks of this step are: Since the sawtooth type deflection current passes through a capacitor arranged in series in the deflection coil, a parabolic voltage is generated across the capacitor and fed back to the input of the amplifier as described above. It is clear that the parabolic component of the control signal can have an amplitude so that the two parabolic signals can correct each other.

However, since this capacitor has a very large capacity, it is formed as an electrolytic capacitor at 1,000 μF or more. Such a capacitor must have a large width of the capacity so that the above correction can be adjusted. Capacity also depends on temperature, and as a result, there will be a seriously varying linearity error.

It is an object of the present invention to achieve satisfactory synchronization between the above-mentioned elements while eliminating the above-mentioned disturbances, while preventing the aforementioned linearity error from occurring.

The circuit device according to the present invention has the following features. That is, a feedback alternating current path including a feed frequency clamping circuit is provided in this circuit arrangement.

In one embodiment of the circuit arrangement according to the invention, a capacitor is arranged in series in the deflection coil, at least one part of the parabolic voltage applied to the capacitor by the deflection current is fed back to the second input terminal, and the generator A feed frequency switch is included, wherein the circuit arrangement is characterized in that a new capacitor is disposed between the switch and the aforementioned capacitor.

Referring to the present invention in detail based on the accompanying drawings as follows.

1 shows a simple basic circuit diagram of a known feed circuit, where Ly is the feed deflection coil. The capacitive sawtooth generator includes one capacitor C _C , which is periodically charged by the current power supply I _C (feed trace time) and discharged by the continuously conducting switch S ( Yield retard time) Thus, a sawtooth waveform voltage Vgen is generated at the condenser C _c to control the input terminal 1 of the amplifier A, which is operated by the supply voltage V _B. The capacitor C _b having a large capacity for supplying the deflection current i _Y to the coil L _Y through the output terminal 3 and blocking the direct current component is disposed in series with the coil L _Y.

The low value resistor R _f is connected in series to the capacitor C _b and the coil L _y , and the remaining unconnected terminals of this resistor and the unconnected terminals of the elements S, I _c and C _c are grounded. . If a voltage exists across the serial network C _b , R _f , this voltage is fed back to the second input terminal 2 of the amplifier A via the feedback dilator network F. Due to this step, the deflection current i _y is generally shaped like the control voltage of the amplifier.

Several periods of the voltage V _gen are shown in FIG.

과

사이를 변하게 된다. 콘덴서(C_b)의 존재로 인해 전류(i_y)의 평균강도(i_m)가 오랜동안에 걸쳐 0이라 하더라도, 전류(i_m)의 일시적인 변화가 발생되어 톱니파에 중첩될 것이다(제3도 참조). 그결과 수상관(도면엔 불표시)의 화면에 나타나는 영상은 빠르게 상하로 움직인다. 이러한 현상은 실제 실시예에 관해서 좀 더 설명될 것이다.The minimum value of voltage V _gen is zero due to the clamping action of the switch S to ground. When the maximum value of this varies between V ₁ and V ₂ values as a result of the frequency change of the switch S, for example, the value of the direct current component of the voltage V _gen is

and

Will change. Capacitor even in a 0 over a period of the average intensity (i _m) due to the presence of (C _b) the current (i _y) is long, is a transient change in the current (i _m) caused to be superimposed on the sawtooth wave (see 3 Fig. ). As a result, the image on the screen of the water pipe (not shown in the drawing) moves up and down quickly. This phenomenon will be explained further with respect to the actual embodiment.

4 shows one known feed circuit.

The voltage applied to the capacitor C _b (the DC approximation of the first approximation) is fed back to the input terminal 2 through the resistor R _S , and the AC voltage applied to the feedback resistor R _f is applied to the capacitor C _f . It is fed back to the input terminal 2 through.

Since the feedback network F thus formed has only two capacitors, no l80 ° phase transition can be produced, so no oscillation takes place. However, when the feedback voltage at the terminal 2 is not much lower than the control voltage V _in at the terminal 1, the overall frequency characteristic of the circuit arrangement shows a peak at a very low frequency (a frequency lower than about 10 Hz). It turns out.

If a sudden change occurs, as in FIG. 2, overshoot or damping oscillation occurs at the average intensity i _m of the deflection current i _y shown in FIG.

This effect can be prevented by connecting a new capacitor in parallel with the resistor R _S , which ensures that the capacitor has a suitable capacity compared to that of the capacitor C _f . However, since the two capacitors have very large capacities, they are formed as electrolytic capacitors so that the two capacities are wide in scope and temperature dependent.

Thus, their ratio cannot be satisfactorily defined and will change. It is better to provide a resistor R _p in series to the capacitor C _f because the resistors are narrower in range and not temperature dependent.

In an experimental example having approximately the following values; (C _b = 2,200 μF, C _f = 1,500 μF, R _s = 560 Ω, R _f = 0.2 전압, voltage applied to R _f = peak-pig value 1V, open-loop gain of amplifier A = 26 dB) Resistance (R _It is found that when _p ) is approximately 12 Hz, the frequency characteristic does not actually show any peaks at very low frequencies.

In essence, the above known steps have the following drawbacks.

In fact, the voltage V _cb applied to the capacitor C _b is not a direct voltage but a parabolic voltage. Because of the resistance R _p , a parabolic voltage is also present at the terminal 2.

Severe linearity error of the current i _y will be avoided if a parabolic voltage concave on the opposite side and of an appropriate amplitude is applied to the control voltage V _in at the terminal 1.

The amplitude of the voltage V _b will depend on its range and temperature since it depends on the capacity of the capacitor C _b . In the case of electrolytic capacitors, the capacity shows a change of 20% with a temperature change of 60 ° C.

The present invention is based on the following facts. The parabolic voltage across the condenser C _b can be fed back separately to the input of the amplifier A, so that the parabolic voltage added to the control signal keeps pace with the voltage V _cb . 5 shows such an embodiment. Amplifier (A) is a class B amplifier with two report transistors (4, 5), the emitters of the transistors are interconnected and connected to the output terminal (3), the collectors are connected to the voltage supply (+ V _B ) and ground do. The input terminal 1 is connected to a wiper on the potentiometer 7 via a condenser 6, and there is a sawtooth voltage generated further by a sawtooth generator at the N point on the potentiometer 7.

The vertical amplitude (image height) is thus adjusted with the help of potentiometer 7. The amplifier A also includes a preamplified transistor 8 whose base is connected to the input terminal 1 and its emitter is connected to the terminal 2. The series connection of the capacitor (C _S ) and the resistor (R _N ) is connected between the point M (junction of the coil L _y ) and the capacitor (C _b ) and the point N, and the diode (D) is connected to the terminal (3) It is inserted between the point P (junction of the resistor R _n and the capacitor C _S ). The diode has a conductive direction as shown in the drawing.

During at least the second half of the retrace time, transistor 4 is cut off while transistor 5 is saturated. At this time, the potential at the terminal 3 becomes equal to the potential of the ground. Thus, the parabolic voltage present at point P is clamped to this potential during the retrace time. By choosing the appropriate resistance ratio of the resistors R _n and R _p , the parabolic component delivered to the point N through the resistor R _n is always compensated for with the parabolic component introduced by the resistor R _p .

Since one parabolic voltage is supplied to the base of the transistor 8 and the other parabolic voltage is supplied to the emitter, the influence on the collector current is reversed.

The linearity of the deflection current i _y no longer depends on the melt of the capacitor C _b , and in turn does not depend on its change.

In order to prevent the very low frequency components attenuated by the resistor R _{P from} being fed back, the clamping circuits C _S and D described above are provided. Since the amplitudes of components with frequencies much lower than the frequency of the clamping pulses (the feed frequency of 50 or 60 Hz) are greatly reduced by this circuit, in practice no low frequency change in the average intensity of the current i _y occurs. . For this purpose the capacitor C _{S must be} arranged such that the charge charged during the trace time is again discharged during the retrace time and the parabola can be passed without distortion. During the retrace time, a potential different from the ground potential can be used instead in the circuit arrangement in FIG. 5, in which the diode D has the proper conduction direction. It is clear that the voltage level at which clamping occurs is not critical if it remains constant.

6 is a modification of the circuit arrangement according to the present invention, in which a toristor T is used instead of a diode. The retrace pulses are induced by the differential network C _d , R _d from the voltage of the terminal 3 and supplied to the base of the transistor T. This step can be used when this voltage is not fixed during the retrace time. The polarity of the pulses obtained as well as the type of transistor is selected so that transistor T can be conducted only during the retrace time.

6 shows that the transistor T is of pnp type and the pulses have a negative value. The emitter of transistor T is connected to a fixed potential, for example a ground potential, while the collector is connected to the junction of resistor R _n and capacitor C _S. If the voltage at point P (depending on the voltage change at point M) is negative with respect to the emitter voltage, transistor T conducts only during the retrace time so that the voltage at point P is essentially clamped at the emitter voltage level. do.

On the other hand, when this voltage is positive, the collector-base diode of the transistor T is conductive. The clamping action also occurs in this case because the emitter-base diode is also conductive because of the retrace pulse.

7 is an embodiment of the circuit arrangement according to the present invention in a combination of the embodiments of FIG. 5 and FIG. Here, both the clamping diode D and the clamping transistor T exist, and may be used even when the clamping action of the collector-may diode of the capacitor C _d and the transistor T is insufficient.

As in FIG. 5, in FIG. 7, the voltage of the terminal 3 is assumed to be fixed during the retrace time (in this case, 0).

In the embodiment of FIG. 8, the parabolic current is fed back to the terminal 2 instead of the parabolic voltage fed back to the terminal 1 as in FIGS. 5, 6 and 7.

A circuit as in FIG. 7, that is, a parabolic voltage clamped as diode D and transistor T, experiences a 180 ° phase transition in FIG. 8, which is by means of a separate transistor T ' The collector of T 'is connected to the terminal 2.

In the embodiments of FIGS. 5, 6, and 7, the correction of the control signal of the amplifier A is related, but in FIG. 8, the correction of itself is related to the bin environment. Therefore, the condition is that the parabolic current by the transistor T 'has the same intensity as the parabolic current by the resistor R _p . Since the value of the resistor R _p is much lower than the value of the resistor R _s (in the above-mentioned embodiment, respectively, 120 and 560 mA), the latter current is divided by the resistor R _s C _b . It is approximately equal to the voltage V _{cb at} both ends. Since the above-mentioned voltage is also present at the point P, the value of the emitter resistor R _e of the transistor T 'should be approximately equal to the value of the resistor R _s . 5, 6, and 7, that is, in the absence of a separate transistor, it is of course possible that the compensation signal is fed back to the terminal 2 without being fed back to the terminal 1 (parabolic signals Assuming the amplifiers (A) are made to compensate for each other).

Although clamping circuits are used in FIGS. 5, 6, 7, and 8, the clamping action of the switch S in the sawtooth generator is used in the embodiment of FIG. 9, so that a separate clamping circuit can be completely omitted. .

The capacitor C _s is installed between the ungrounded terminal of the capacitor C _c and point M in FIG. 9. As a result, parabolic voltage is present across the capacitor C _c , and its amplitude

Where C _c and C _s represent the capacitances of the capacitors C _c and C _s . The amplitude of the parabolic component on terminal 1

를 갖는데, 여기서 R_p와 R_s는 각각 저항(R_p와 R_s)의 저항값들이다.Where V _in is the amplitude of the input voltage at terminal 1 and V _gen is the amplitude of the voltage across capacitor C _c . The parabolic voltage across the resistor (R _p ) is amplitude

The gatneunde, where R _p and R _s are the respective resistance of the resistor (R _p and R _s).

All of the calculated voltages should be the same for the following correction because R _p is much smaller than R _s .

인자는 무시할 정도이다. 위 식에서

는

에 따라 달라지기 때문에 전위차계(7)의 위치에 따라 또한 달라지는 것은 사실이다. 그러나 그것의 폭은 작다. 왜냐하면 편향 전류의 필요한 진폭이 작은 폭을 필요로 하며 또한 궤환에 의해 이것마저 감소되기 때문이다. 실제에 있어서는

의 변화에 따른

의 변화는 용량의 허용값에 의해 야기된 폭 보다 아직 작다는 것이 밝혀졌다.Since the capacitor C _s is parallel to the capacitor C _c with respect to the saw tooth generator, the capacity of the capacitor C _c should be suitable in this case. However, the sawtooth waveform voltage across resistor (R _f ) is also fed back.

The argument is negligible. From the stomach

Is

It is also true that it also depends on the position of the potentiometer 7 as it depends on. But its width is small. This is because the required amplitude of the deflection current requires a small width and is also reduced by feedback. In reality

According to the change of

It has been found that the change of is still smaller than the width caused by the tolerance of the dose.

It is to be noted that the circuit arrangement of FIG. 9 only requires one capacitor, which is only possible when the polarity of the output signal of the amplifier A is equal to the polarity of the signal generated by the sawtooth generator. If this is not the case, a separate clamping circuit should be provided as in Figs. 5, 6, 7, 8, in which a feed retrace pulse, for example pulses generated at terminal 3, should be used.

Since very low frequency components are greatly reduced but not completely eliminated, some error will remain. However, with the circuit arrangement according to FIG. 9, experiments with the above-mentioned values of C _b , C _f , R _s , and R _f reveal that overshoots occurring are less than 5% of the original uncorrected value. While this phenomenon occurs for approximately 0.1 seconds.

It should be noted that all the above-described embodiments of the circuit arrangement according to the present invention are based on the known circuit arrangement of FIG.

It is clear that the scope of the invention is not limited to this. Another feedback network is known, in which there are one or more capacitors with high capacitance values and the above steps are used. It is also clear that the clamping pillars (although this is more practical) do not have to be retrace pulses. Clamping circuits are also possible, where a level diode is used. For example, in the circuit arrangement of FIG. 5, the cathode of the diode D is grounded.

However, it is clear that it has a better effect than a circuit device having a clamping pulse and provides minimal distortion in the parabolic component.

Claims (1)

A sawtooth waveform control signal is supplied from the sawtooth generator to the first input terminal of the amplifier, the amplifier having an output terminal coupled to the deflection coil, and at least one second input for coupling the feedback path for low frequency and the feedback path for high frequency. Low frequency oscillation or overshoot of the average value of the deflection current in a known vertical deflection current generating circuit device having a terminal and at least one part of the parabolic voltage generated across the capacitor by the deflection current is fed back to the second input terminal described above. To provide a feedback current path to the circuit device to prevent the linear error and to correct the linearity error. A parabolic signal that depends on the parabolic voltage described above is supplied to one of the above-described input terminals through the above-mentioned path. The above-mentioned path is a vertical deflection current generating circuit characterized by consisting of a feed frequency clamping circuit. .

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