KR940001721A - Fan Vector Interface for Displaying a 16: 9 MAC Screen on a 4: 3 Receiver - Google Patents

Fan Vector Interface for Displaying a 16: 9 MAC Screen on a 4: 3 Receiver Download PDF

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Publication number
KR940001721A
KR940001721A KR1019920010477A KR920010477A KR940001721A KR 940001721 A KR940001721 A KR 940001721A KR 1019920010477 A KR1019920010477 A KR 1019920010477A KR 920010477 A KR920010477 A KR 920010477A KR 940001721 A KR940001721 A KR 940001721A
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South Korea
Prior art keywords
fan
fan vector
screen
signal
vector
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KR1019920010477A
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Korean (ko)
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KR0147551B1 (en
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권주한
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강진구
삼성전자 주식회사
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Priority to KR1019920010477A priority Critical patent/KR0147551B1/en
Priority to GB9302408A priority patent/GB2269507B/en
Priority to DE4307418A priority patent/DE4307418C2/en
Publication of KR940001721A publication Critical patent/KR940001721A/en
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Publication of KR0147551B1 publication Critical patent/KR0147551B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0117—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal
    • H04N7/0122—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving conversion of the spatial resolution of the incoming video signal the input and the output signals having different aspect ratios
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/04—Systems for the transmission of one television signal, i.e. both picture and sound, by a single carrier
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T9/00—Image coding
    • G06T9/008—Vector quantisation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/08—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division
    • H04N7/083—Systems for the simultaneous or sequential transmission of more than one television signal, e.g. additional information signals, the signals occupying wholly or partially the same frequency band, e.g. by time division with signal insertion during the vertical and the horizontal blanking interval, e.g. MAC data signals

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Computer Graphics (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Color Television Systems (AREA)
  • Television Systems (AREA)
  • Processing Of Color Television Signals (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

이 발명은 D2-MAC 방송을 수신하기 위한 D2-MAC 수신기에 관한 것으로서, MAC 수신기에서 D2-MAC 방송에 16 : 9 화면방송을 할 경우의 팬 벡터가 기존의 4 : 3 화면비의 수상기에서의 펜 벡터에 대응되도록 하기 위하여 D2-MAC 방송신호의 라인 625에 화면에서 영상이 어느위치에 디스플레이되는 가에 대한 정보인 팬 벡터 데이타를 실어 송신하면 수신측에서 MAC 신호의 라인 625를 디코딩하여 송신측에서 보낸 펜 벡터를 이용하여 16 : 9화면을 4 : 3 화면으로 볼 수 있도록 16 : 9화면과 4 : 3화면의 수평비율인 16 : 12에 해당하는 만큼인 휘도신호와 색차신호의 샘플갯수인 523개와 262개를 휘도신호 및 색차신호 샘플카운터에서 샘플링하여 색차신호 및 휘도신호용 팬 벡터 데이타 변환부에서 출력되는 PCO∼PC7및 PYO∼PY7을 이용하여 휘도 및 색차 신호 메모리부에서 4 : 3 화면에 대응하는 휘도신호 및 색차신호가 출력되게 함으로써 16 : 9의 횡장화면을 위한 영상이 4 : 3 화면에서도 정보의 손실없이 디스플레이되게 한 것이다.The present invention relates to a D2-MAC receiver for receiving a D2-MAC broadcast, wherein a fan vector when a 16: 9 screen broadcast is performed on a D2-MAC broadcast by a MAC receiver is used in a conventional 4: 3 aspect ratio pen. In order to correspond to the vector, when the fan vector data, which is information on which position is displayed on the screen, is transmitted on the line 625 of the D2-MAC broadcasting signal, the receiving side decodes the line 625 of the MAC signal at the transmitting side. 523, which is the number of samples of luminance signal and chrominance signal, corresponding to the horizontal ratio of 16: 9 screen and 16: 3 screen, so that 16: 9 screen can be seen as 4: 3 screen using the sent pen vector. 4 and 3 screens in the luminance and chrominance signal memory section using PCO to PC7 and PYO to PY7, which are sampled at the luminance signal and chrominance signal sample counter and output from the pan vector data converter for chrominance signal and luminance signal. For the traverse of the screen 9, the image 4: corresponding to the luminance signal and color difference signals by the output 16, which will be one to be displayed without loss of information in the third screen.

Description

4 : 3수상기에 16.9의 MAC화명르 디스플레이하기 위한 팬 벡터 인터페이스회로4: Fan Vector Interface Circuit for Displaying 16.9 MAC Marks on Three Receivers

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 이 발명에 따른 4 : 3수상기에 16 : 9의 MAC 화면을 디스플레이하기 위한 팬 벡터 인터페이스회로의 일실시예를 나타낸 블럭도.2 is a block diagram showing an embodiment of a fan vector interface circuit for displaying a 16: 9 MAC screen on a 4: 3 receiver according to the present invention.

제3도는 제2도의 상세회로도이다.3 is a detailed circuit diagram of FIG.

Claims (5)

D2-MAC 방송 수신기에 있어서, IM 버스를 통해 팬 벡터에 대한 정보가 포함된 어드레스 및 팬 벡터 데이타가 포함된 데이타와 클럭을 출력하는 마이콤(MICOM)과, 상기 마이콤(MICOM)에 연결되어 상기 IM버스에 실려오는 팬 벡터의 어드레스를 디코딩하는 팬 벡터 어드레스 디코딩부(100)와, 상기 마이콤(MICOM) 및 팬 벡터 어드레스 디코딩부(100)에 연결되어 디코딩된 팬 벡터의 어드레스가 송신측에서 전송한 어드레스와 매칭되었을 경우 데이타 라인에 실린 팬 벡터를 LSB부터 읽기시작하는 팬 벡터 데이타 리드부(200)와, 상기 팬 벡터 데이타 리드부(200)에 연결되어 읽혀진 팬 벡터 데이타를 4;3화면에 대응하는 휘도신호 및 색차신호용 팬 벡터 값으로 변환하는 팬 벡터 데이타 변환부(370)와, 상기 펜 벡터 데이타 변환부(300)에 연결되어 팬 벡터 데이타 변환부(307)로부터의 4 : 3 화면에 대응하는 휘도신호 및 색차신호용 팬 벡터 갑에 따라 523, 262의 휘도신호 및 색차신호 샘플을 읽어내는 휘도신호 및 색차신호 샘플카운터(400), (500)와, 상기 휘도신호 및 색차신호 샘플카운터(400), (500)에 연결되어 휘도신호 및 색차신호 샘플카운터(400), (500)로부터 발생되는 어드레스에 따라 저장된 휘도 및 색차신호를 출력하는 휘도신호 및 색차신호 메모리부(600), (700)로 구비되는 4 : 3 수상기에 16 9의 MAC 화면을 디스플레이하기 위한 팬 벡터 인터페이스회로.A D2-MAC broadcast receiver comprising: a microcomputer (MICOM) for outputting a clock and data including a fan vector data and an address including information about a fan vector, and a microcomputer (MICOM) connected to the microcomputer (MICOM). The fan vector address decoding unit 100 which decodes the address of the fan vector loaded on the bus, and the address of the decoded fan vector connected to the MICOM and the fan vector address decoding unit 100 are transmitted from the transmitter. If the address is matched, the fan vector data read part 200 which starts reading the fan vector loaded on the data line from the LSB and the fan vector data read connected to the fan vector data read part 200 correspond to 4: 3 screens. A fan vector data converter 370 for converting a fan vector value for a luminance signal and a color difference signal to a fan vector data converter 307 connected to the pen vector data converter 300. Luminance signal and color difference signal sample counters 400 and 500 for reading luminance signal and color difference signal samples of 523 and 262 according to the luminance signal and color difference signal fan vector corresponding to the 4: 3 screen of the image; Luminance signal and chrominance signal memory connected to the signal and chrominance signal sample counters 400 and 500 and outputting the stored luminance and chrominance signals according to addresses generated from the luminance signal and the chrominance signal sample counters 400 and 500. A fan vector interface circuit for displaying a MAC screen of 16 9 on a 4: 3 receiver provided with units 600 and 700. 제1항에 있어서, 상기 팬 벡터 어드레스 디코딩부(100)는. ID 신호가 로우인 기값동단 인에이블되어 입력되는 클럭의 상승 에지마다 입력되는 데이타를 쉬프트하여 출력하는 쉬프트 레지스터(SR1)와, 상기 쉬프트 레지스터(SRl)에 연결되어 입력되는 데이타를 출력측과 매칭시키기 위한 비트 매칭부(110)와, 상기 비트 매칭부(117)에 연결되어 입력되는 어드레스가 팬 벡터에 대응하는 어드레스일 경우 출력이 하이상태가 되는 D플립플롭(DFFI)과, 클럭단자(CLKI) 및 ID 라인 (IL)에 연결되어 상기 D플립를롭(DFFI)에 클리어용 펄스를 공급하는 카운터(120)로 구비되는 4 : 3 수상기에 16 : 7의 MAC 화면을 디스플레이하기 위한 팬 벡터 인터페이스회로.The method of claim 1, wherein the fan vector address decoding unit (100). Shift register SR1 for shifting and outputting the input data at each rising edge of the input clock when the ID signal is low, which is enabled at the same time, and for matching the input data connected to the shift register SRl with the output side. When the address connected to the bit matching unit 110 and the bit matching unit 117 is an address corresponding to the fan vector, the D flip-flop DFFI, the clock terminal CLKI, A fan vector interface circuit for displaying a MAC screen of 16: 7 on a 4: 3 receiver connected to an ID line IL and provided with a counter 120 for supplying a clear pulse to the D flip-flop DFFI. 제1항에 있어서, 상기 팬 벡터 데이타 리드부(200)는, 상기 D플립플롭(DFFI)에 연결되어 상기 D플립플롭(DFFI)의 출력이 하이상태일 경우 입력되는 펜 벡터 데이타를 쉬프트하여 출력하는 쉬프트 레지스터(SR2)와, 상기 클럭단자(CLKl) 및 상기 팬 벡터 디코딩부(100)에 연결되어 상기 쉬프트 레지스터(SR2) 출력(Q0)∼(Q7)이 모두 나타나는 순값 카운팅 동작을 완료하는 카운터(210)와, 상기 쉬프트 레지스터(SR2) 및 카운터(217)에 연결되어 상기 카운터(210)의 카운팅 동작 완료시 상기 쉬프트 레지스터(SR2)의 데이타를 출력하는 래치(220)로 구비되는 4 : 3 수상기에 16 : 9의 MAC 화면을 디스플레이하기 위한 펜 벡터 인터페이스회로.The pen vector data lead unit 200 of claim 1, wherein the fan vector data lead unit 200 is connected to the D flip-flop DFFI and shifts the pen vector data input when the output of the D flip-flop DFFI is high. A counter connected to the shift register SR2, the clock terminal CLKl, and the fan vector decoding unit 100 to complete a net value counting operation in which all of the shift registers SR2 outputs Q0 to Q7 appear. And a latch 220 connected to the shift register SR2 and the counter 217 to output data of the shift register SR2 when the counting operation of the counter 210 is completed. A pen vector interface circuit for displaying a 16: 9 MAC screen on a receiver. 제1항에 있어서, 상기 팬 벡터 데이타 변환부(300)는, 상기 팬 벡터 데이타 리드부(277)에 연결되어 팬 벡터 데이타 리드부(200)로부터 읽혀진 팬 벡터 데이타를 4 : 3화면에 대응하는 휘도신호 및 색차신호용 팬 벡터 값으로 변환하는 휘도신호 및 색차신호 팬 벡터 데이타 변화부(317), (320)로 구성되는 4 : 3수상기에 16 : 7의 MAC 화면을 디스플레이하기 위한 팬 벡터 인터페이스회로.The fan vector data conversion unit 300 is connected to the fan vector data read unit 277 so that the fan vector data read from the fan vector data read unit 200 corresponds to 4: 3 screen. A fan vector interface circuit for displaying a MAC screen of 16: 7 on a 4: 3 receiver consisting of a luminance signal and a color difference signal fan vector data changing unit 317, 320 for converting into a fan vector value for a luminance signal and a color difference signal. . 제4항에 있어서, 상기 휘도신호 및 색차신호 팬 벡터 데이타 변환부(310), (320)는, 전가산기(311), (312)와 전가산기(321), (322)로 구성되는 4 : 3 수상기 에 16 : 9의 MAC 화면을 디스플레이하기 위한 팬 벡터 인터페이스회로.The method according to claim 4, wherein the luminance signal and color difference signal fan vector data converting units (310, 320) comprise full adders (311), (312) and full adders (321), (322). Fan vector interface circuitry for displaying a 16: 9 MAC screen on a three receiver. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920010477A 1992-06-17 1992-06-17 Pan vector interface circuit for mac display with 16:9 ratio on the 4:3 ratio monitor KR0147551B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019920010477A KR0147551B1 (en) 1992-06-17 1992-06-17 Pan vector interface circuit for mac display with 16:9 ratio on the 4:3 ratio monitor
GB9302408A GB2269507B (en) 1992-06-17 1993-02-08 Television signal and receiver therefor
DE4307418A DE4307418C2 (en) 1992-06-17 1993-03-09 D2-MAC receiver with a pan vector interface circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920010477A KR0147551B1 (en) 1992-06-17 1992-06-17 Pan vector interface circuit for mac display with 16:9 ratio on the 4:3 ratio monitor

Publications (2)

Publication Number Publication Date
KR940001721A true KR940001721A (en) 1994-01-11
KR0147551B1 KR0147551B1 (en) 1998-09-15

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KR1019920010477A KR0147551B1 (en) 1992-06-17 1992-06-17 Pan vector interface circuit for mac display with 16:9 ratio on the 4:3 ratio monitor

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DE (1) DE4307418C2 (en)
GB (1) GB2269507B (en)

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Publication number Priority date Publication date Assignee Title
US5598514A (en) * 1993-08-09 1997-01-28 C-Cube Microsystems Structure and method for a multistandard video encoder/decoder
US5910909A (en) * 1995-08-28 1999-06-08 C-Cube Microsystems, Inc. Non-linear digital filters for interlaced video signals and method thereof
KR20220000415U (en) 2020-08-10 2022-02-17 김용 Circular structure for heating water boiler

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US4654696A (en) * 1985-04-09 1987-03-31 Grass Valley Group, Inc. Video signal format
US4730215A (en) * 1986-05-30 1988-03-08 Rca Corporation Compatible wide screen television system with variable image compression/expansion
GB8911493D0 (en) * 1989-05-18 1989-07-05 Indep Broadcasting Authority Data transmission in the active picture period
DE4002588A1 (en) * 1990-01-30 1991-08-01 Thomson Brandt Gmbh LETTERBOX COLOR TV SYSTEM WITH DESERTED ADDITIONAL INFORMATION
HU220405B (en) * 1991-04-18 2002-01-28 Bräu Verwaltungsgesellschaft mit beschränkter Haftung Process for transmitting signal mode supplementary information in a television signal
JPH0514866A (en) * 1991-06-28 1993-01-22 Sony Corp Video signal transmission method
JP3395196B2 (en) * 1992-01-27 2003-04-07 ソニー株式会社 Video signal transmission method and playback device

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GB2269507A (en) 1994-02-09
GB9302408D0 (en) 1993-03-24
DE4307418A1 (en) 1994-02-17
KR0147551B1 (en) 1998-09-15
DE4307418C2 (en) 1997-06-12
GB2269507B (en) 1996-04-24

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