KR930017224A - Semiconductor light emitting device and manufacturing method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device in which a V-channel is formed by dry fixation or wet bonding after a current-generating layer is grown on a substrate having a concave stripe pattern, and a manufacturing method thereof. . In addition, the semiconductor light emitting device configured as described above increases the effect of only the current difference in the vicinity of the V-channel and reduces the leakage current, thereby improving the stable mode and light output characteristics due to the low threshold current value and the high light efficiency. Improve various characteristics.

Description

Semiconductor light emitting device and manufacturing method thereof

Since this is an open matter, no full text was included.

2 is a vertical sectional view of the VSIS laser diode according to the present invention, and (a) to (d) of FIG. 3 are manufacturing process diagrams of the VSIS laser diode of FIG. 2 according to the present invention.

Claims (17)

A semiconductor light emitting device having a V-channel, comprising: a substrate having a first groove and a first portion of a second groove formed under the first groove, a second portion of the second groove formed in the first groove, A first layer formed on the substrate and having a third portion of the second groove formed on the upper portion of the second portion, a second layer formed on the second groove region and the first layer, and a third stacked sequentially on the second layer; And a linear electrode formed on the fourth and fifth layers and on an upper portion of the fifth layer and a lower portion of the substrate. The semiconductor light emitting device of claim 1, wherein the substrate is a III-V compound semiconductor. The semiconductor light emitting device according to claim 2, wherein the group III-V compound semiconductor is a GaAs game of the group III-V group. The semiconductor light emitting device of claim 1, wherein the substrate is a high concentration of P-type GaAs. The semiconductor light emitting device of claim 1, wherein a width of the first groove is about 10 μm to about 20 μm. The semiconductor light emitting device of claim 1, wherein the first layer, the fourth layer, and the fifth layer are N-type, respectively. The semiconductor light emitting device of claim 1, wherein the second layer and the third layer are P-type. The semiconductor light emitting device of claim 1, wherein the first and fifth layers are GaAs, and the second, third, and fourth layers are AlGaAs. Forming a stripe-shaped groove on the semiconductor substrate before the crystal growth, and growing the first layer by the liquid crystal crystal dressing method, and selectively etching the first layer and the substrate formed on the groove region to the channel portion Forming a V-groove, growing a second layer, a third layer, a fourth layer, and a fifth layer sequentially by a secondary liquid crystal growth method, and on the fifth layer and the bottom of the substrate. A method for manufacturing a semiconductor light emitting device, comprising: forming a V-channel by depositing an electrode on the substrate. 10. The method of claim 9, wherein the substrate is a III-V compound semiconductor. The method of manufacturing a semiconductor light emitting device according to claim 10, wherein a GaAs system is used in the group III-V group semiconductor of the group III-V compound semiconductor. The method of manufacturing a semiconductor light emitting device according to claim 9, wherein the substrate is made of a high concentration of P-type GaAs or InP. The method of manufacturing a semiconductor light emitting device according to claim 9, wherein the V-groove is formed by snack etching or wet etching. The method of claim 9, wherein the V groove is formed to have a width of about 10 to 20 μm. The method of claim 9, wherein the V groove is a current injection region that is a channel portion. 10. The method of claim 9, wherein the first layer, the fourth layer, and the fifth layer are P-type, and the second and third layers are P-type. 10. The method of claim 9, wherein the first and fifth layers are GaAs, and the second, third and fourth layers are AlGaAs. ※ Note: The disclosure is based on the initial application.