JPS58148481A - Semiconductor laser having embedded heterogeneous structure - Google Patents

Semiconductor laser having embedded heterogeneous structure

Info

Publication number
JPS58148481A
JPS58148481A JP3205982A JP3205982A JPS58148481A JP S58148481 A JPS58148481 A JP S58148481A JP 3205982 A JP3205982 A JP 3205982A JP 3205982 A JP3205982 A JP 3205982A JP S58148481 A JPS58148481 A JP S58148481A
Authority
JP
Japan
Prior art keywords
layer
active layer
semiconductor
conductive
mesa
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3205982A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Kitamura
北村 光弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3205982A priority Critical patent/JPS58148481A/en
Publication of JPS58148481A publication Critical patent/JPS58148481A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2237Buried stripe structure with a non-planar active layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/24Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a grooved structure, e.g. V-grooved, crescent active layer in groove, VSIS laser

Landscapes

  • Semiconductor Lasers (AREA)

Abstract

PURPOSE:To improve resproducibility of crystal growth and to improve a manufacuturing yield rate of BH-LD, by forming a groove which is held between two narrow mesa stripes so as to pierce through a second conductive semiconductor layer, and embedding an active layer in said groove part. CONSTITUTION:The two very narrow mesa stripes 251 and 252 having a thickness of 2mum are provided in advance. An An0.72Ga0.28As0.61P0.39 active layer 205 is grown in the part of the V groove 253 held between the two stripes 251 and 252. Owing to the property of the crystal growth characterized by the fact that the active layer is not laminated on the upper surface of a mesa, the active layer is embedded in a split form in the V groove 253 and is not grown continuously.

Description

【発明の詳細な説明】 本発明は活性層の肩囲を、活性層よりもエネルギーギャ
ップが大吉く、屈折串が小さな半導体材料でおおわれ九
埋め込みヘテ四構造半導体レーザに関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a buried heterostructure semiconductor laser in which the shoulder circumference of the active layer is covered with a semiconductor material having a larger energy gap and a smaller refractive index than the active layer.

颯め込みヘテ四構造半導体し−f(BH−LD)は低い
発振しきい値電流、安定化され九発振横モード、高温動
作可能などの優れた特性を有して−る九め、光7アイパ
通信用光源として注目を集めてψる。例えば、大村風ら
は1980年発行のエレタト撃エクス・レターズ(n1
ectronics Letters)誌−hlHsl
s嬉14号、謔566頁から嬉568頁までの中で報告
して−るように、ベリード・フレラセン)(Be)レー
ザと呼ばれる颯め込み厘の半導体レーずを開発し九〇こ
れはIIIIJK示した様Kn−1nP基板101上K
 P−1n1−xGAx%P1−、電流プロッタ層i 
02* p −I mP 1llILプvxyp層10
3を成長サセ九半導体ウェファK <011)方向に平
行に輻2svxs lkk度のストライプ状の濤110
をn−InP基板101 K達するまでの深さでエツチ
ングにより形成し、n−IrJPバッファ層104.お
よびTnt−zαazAswPt−w活性層105の一
部が、この濤110の中に埋め込まれるように成長させ
たものであり、三日月状に埋め込まれた活性層をもつB
H−LDである。ここではストライプ状の濤110をエ
ツチングによって形成することKよp Tnx−zGa
zAiwPl−w活性層105を含む溝110の周囲に
自動的にp−n−p−n接合が形成されて、それが自動
的に電流ブロック領域となる。
The integrated heterostructure semiconductor (BH-LD) has excellent characteristics such as low oscillation threshold current, stabilized oscillation transverse mode, and high-temperature operation. It has attracted attention as a light source for AIPA communications. For example, Kaze Omura et al.
electronics Letters) magazine-hlHsl
As reported in Surei No. 14, pages 566 to 568, we have developed an advanced semiconductor laser called the Be laser. K on the Kn-1nP substrate 101 as shown
P-1n1-xGAx%P1-, current plotter layer i
02* p -I mP 1llILpvxyp layer 10
3 is grown in a series of nine semiconductor wafers parallel to the K<011) direction in a striped shape with a radius of 2svxslkk.
is formed by etching to a depth reaching the n-InP substrate 101K, and the n-IrJP buffer layer 104. And a part of the Tnt-zαazAswPt-w active layer 105 is grown so as to be embedded in this layer 110.
It is H-LD. In this case, striped stripes 110 are formed by etching.
A pn-pn junction is automatically formed around the trench 110 containing the zAiwPl-w active layer 105, which automatically becomes a current blocking region.

大村式らは、この構造のBH−LDで室ICWの発振し
きい値20snAを得ている。
Shiki Omura et al. obtained a chamber ICW oscillation threshold of 20 snA with a BH-LD having this structure.

しかしながら、このタイプのBH−LDにおいては、以
下に示すような製造上の欠点がある。すなわち活性層を
半導体中に分離して埋め込み、良好な特性のBH−LD
を実現するためには、半導体ウェファ上に形成され九幅
わずか2μmIi!度の溝のふちでIn1−zGazA
swPl−w活性層105をとぎれるように成長させる
必要がある。そにτかかわらず、この晟長過幌でI n
 s −z Gax AswP t−gy活性層105
が堀め込まれずに連続して成長してしまうなど、結晶成
長の再現性が悪く、製造歩留りが悪いという欠点があっ
九。
However, this type of BH-LD has the following manufacturing drawbacks. In other words, the active layer is separated and buried in the semiconductor, resulting in a BH-LD with good characteristics.
In order to realize this, it must be formed on a semiconductor wafer with a width of only 2 μmIi! In1-zGazA at the edge of the groove
It is necessary to grow the swPl-w active layer 105 in an intermittent manner. Regardless of the situation, in this night, I n
s -z Gax AswP t-gy active layer 105
The drawbacks include poor crystal growth reproducibility, such as continuous growth without being drilled, and poor manufacturing yield.

本発明の目的は上記の欠点を除去すべく、→−活性層が
溝の中に確実KI[め込まれて形成され、結晶成長の再
現性、製造歩留抄の良I72埋め込みヘテ田構造半導体
レーザを提供するととにある。
The purpose of the present invention is to eliminate the above-mentioned drawbacks by providing a semiconductor with an I72 buried hetada structure in which the active layer is reliably embedded in the groove and has good crystal growth reproducibility and manufacturing yield. It is said that the laser is provided.

本発明による埋め込みヘテp構造半導体レーザの構成は
、活性層のl18!が活性層よりも屈折串が小さく、か
つエネルギーギャップの大きな半導体材料で、おおわれ
て−る埋め込みへテロ構造半導体レーザにお−て、第1
導電型半導体−−KII接して112導電型半導体層が
形成され、前記第2導電型半導体層に2本の平行なメサ
ストライプが形成され、前記2本のメサストライプによ
ってはさまれた濃は、前記lI2導電■半導体層をつき
ぬけ九構造となってお抄、前記2本のメすストライプの
上面を除いてIII導電型クラッド層、および活性層が
少なくとも前記溝内部に積層され、さらに前記活性層及
びメサストライプ上の全面にゎたって第2導電型クラッ
ド層が形成され九構造を具備していることを特徴として
いる。
The structure of the buried heterop-structure semiconductor laser according to the present invention is that the active layer is l18! In a buried heterostructure semiconductor laser in which the active layer is covered with a semiconductor material having a smaller refractive index and a larger energy gap than the active layer, the first
Conductive type semiconductor--A 112 conductive type semiconductor layer is formed in contact with KII, two parallel mesa stripes are formed in the second conductive type semiconductor layer, and a deep layer sandwiched between the two mesa stripes is A cladding layer of III conductivity type and an active layer are laminated at least inside the trench, except for the top surface of the two female stripes, and an active layer is formed by penetrating the II2 conductive semiconductor layer into a nine-structure structure. A cladding layer of the second conductivity type is formed over the entire surface of the mesa stripe, and has a nine-structure structure.

以下実施例を示す図面を参照しつつ本発明を説明する。The present invention will be described below with reference to drawings showing embodiments.

嬉2図は本発明の第1の実施例であるBH−LDの断面
図を示す。このようなりH−LDを得るKは、まず第1
導電型テする(100)n−4nP基板201上にn−
InPバッファ層202.w1212導電型半導である
p−InP電流ブロック層203を順次積層させ九多層
膜構造半導体ウェファに通常のフォトリングラフィの手
法を用いて2回のエツチングを行なμ幅2JIm、平坦
部よりの高さ0.5μmの2本の平行なメサストライプ
251.252およびそれらによってはさまれて形成さ
れ九幅2声m、深さ2 JlmのV濤253をpJnP
電流ブロック層203をつきぬけるようにしてユ11〉
方向に平行に形成する。p−rnP電流ブロック層20
3をつきぬけるようにするのは、そうしないと発光再結
合する活性層に電流が効率よく注入されないためである
。このようにして得た半導体ウェファ[1114電型ク
ラッド層であるn−4nP電流ブロック層2049発光
波長1.3μmに対応するIn00丁! Ga6.@ A s6.@@ NH活性層205をもと
に2本の平行なメサストライプ251.252の上面の
みを除いて積層させる。このようなことはメサストライ
プの輻が扶ければ、吉わめて容易である。さらに第2導
電型クラッド層であるpJnP埋め込み層206゜発光
波長1.1μm組成のP−Tnl1410aQ、11λ
kss Po、sy電極層207を全面にわたって連続
して積層させる。
Figure 2 shows a sectional view of a BH-LD which is a first embodiment of the present invention. K to obtain H-LD in this way is first
n-4nP substrate 201 with conductivity type (100)
InP buffer layer 202. The p-InP current blocking layer 203, which is a w1212 conductivity type semiconductor, is sequentially laminated and etched twice using a normal photolithography method on a nine-layered semiconductor wafer with a μ width of 2JIm, starting from the flat part. Two parallel mesa stripes 251 and 252 with a height of 0.5 μm are formed between them, and a V 253 with a width of 2 m and a depth of 2 Jlm is formed by pJnP.
11 so as to pass through the current blocking layer 203
Form parallel to the direction. p-rnP current blocking layer 20
3 is made to pass through because otherwise, current will not be efficiently injected into the active layer that undergoes radiative recombination. The thus obtained semiconductor wafer [1114 type cladding layer, n-4nP current blocking layer 2049, In00 layers corresponding to the emission wavelength of 1.3 μm]. Ga6. @A s6. @@ Based on the NH active layer 205, two parallel mesa stripes 251 and 252 are laminated except for only the upper surfaces. This is extremely easy if the mesa stripes are not convergent. Furthermore, a pJnP buried layer 206°, which is a second conductivity type cladding layer, is P-Tnl1410aQ with a composition of 1.1 μm emission wavelength, 11λ
The kss Po, sy electrode layer 207 is continuously laminated over the entire surface.

このように本発明の実施例のBH−LDにおいては埋め
込み活性層を形成するために幅2μmときわめて狭−2
本のメサストライプをあらかじめ設けておき、その2本
のメサストライプにはさまれた■濤の部分にIn6.g
 G4.HAS6.@IP@4活性層203を成長させ
る方法をとっている。す表わち、この発明ではメサ上面
に活性層が積層しないという結晶成長の性質を利用して
おり、活性層がv#I内部に途切れて一←鳳めこまれて
形成される。
In this way, in the BH-LD of the embodiment of the present invention, the width is extremely narrow -2 μm to form the buried active layer.
The mesa stripes of the book are prepared in advance, and the In6. g
G4. HAS6. A method of growing the @IP@4 active layer 203 is used. In other words, the present invention utilizes the property of crystal growth in which the active layer is not stacked on the top surface of the mesa, and is formed by cutting off and inserting the active layer inside v#I.

したがって、従来例のように活性層が連続して成長して
BH−LDの結晶成長の再現性、製造歩留9が悪くなる
ということがなく、高性能なりH−LDが、きわめて再
現性よく得られる。最後にP形電fi 208. ya
形電電1i209を形成し、製造を終える・本発明の■
献hAsPBH−LDにおいて室温での発振しきい値電
流が1 (?”!0rnA 、微分量子効率が、5トロ
0%というBH−LDがきわめて歩留りよく得られたO 次Kl!3図には、本発明の第2の実施例のBH−LD
を示す・これも第1O実施例に示したBH−、LDとほ
ぼ同様にできる。この場合には第1導電型半一。
Therefore, unlike conventional examples, the active layer does not grow continuously and the reproducibility of BH-LD crystal growth and manufacturing yield9 deteriorate, and high-performance H-LDs can be produced with extremely high reproducibility. can get. Finally, P type electric fi 208. ya
1i209 of the present invention is formed and the manufacturing is completed.
In the O-order Kl!3 diagram, a BH-LD with an oscillation threshold current of 1 (?"!0rnA at room temperature and a differential quantum efficiency of 5 to 0%) was obtained with an extremely high yield in the dedicated hAsPBH-LD. BH-LD of the second embodiment of the present invention
This can also be done in almost the same way as BH- and LD shown in the first O embodiment. In this case, it is the first conductivity type.

導体基板である( 100)a−TnP基板301にP
形不純物であるcdt−g散することによって、第2導
電型半導体層であるCd拡散層302を形成する。仁の
層の厚さは1.5μmとし、tIMlの実施例と同様、
2本の平行なメサストライプ351.352およびそれ
らKよってはさまれて形成されたストライプ濤303を
エツチングによって形成する。この際、溝303のエツ
チングには、例えばByメタノール系のエツチング液を
用いることによシ、図中に示した様に逆メサ形状のエツ
チング濤を形成することができる。
P is applied to the (100) a-TnP substrate 301, which is a conductor substrate.
A Cd diffusion layer 302, which is a second conductivity type semiconductor layer, is formed by dispersing cdt-g, which is a type impurity. The thickness of the layer was 1.5 μm, and as in the tIMl example,
Two parallel mesa stripes 351 and 352 and a stripe 303 sandwiched between them are formed by etching. At this time, by using, for example, a By methanol-based etching solution for etching the grooves 303, it is possible to form an etching field in the shape of an inverted mesa as shown in the figure.

このようにした得た半導体ウェファ上1こ、第1の実施
例の場合と同様に、2本のメサストライプ351゜35
2部分を除いて嬉1導電厘タラ、ド層であるn−TnP
電流プロ、ダ層3o49発光波長1.3 xm WC相
当するIn6y2 o−−ル&U po、鱒活性層30
5を順次積層させ、さらに全面にわたりて第2導電型ク
ラッド層であるp−InPクラッド層30& p−Lk
yt Ga64AI&lIj p、節電極層307を積
層させ、目的のBH−LDを得る。このようK11I2
の実施例においては、#g2導電型半導体層としてCd
O拡散KzるCd拡散層302をn−TnP基板301
に形成したことによシ、エピタキシャル成長工程は、た
だ1度です心と一つ利点がある。この場合にも、もちろ
ん活性層は確実にエツチング濤303の内部に埋め込ま
れて形成されるので、従来例と比べ、結晶成長の再現性
BH−LDの製造歩留りは50%以上向上した。このよ
うKして製作したBH−LDにおいても、I!lの実施
例に示したものと同一度の特性のものが、9構性よ(得
られた。
On the thus obtained semiconductor wafer, two mesa stripes 351°35
Except for two parts, the conductive layer is n-TnP.
Current pro, da layer 3o49 emission wavelength 1.3 xm WC equivalent In6y2 o-le & U po, trout active layer 30
5 are sequentially laminated, and a p-InP cladding layer 30 & p-Lk which is a second conductivity type cladding layer is formed over the entire surface.
yt Ga64AI&lIj p and a nodal electrode layer 307 are laminated to obtain the desired BH-LD. Like this K11I2
In the example, Cd is used as the #g2 conductivity type semiconductor layer.
O-diffused Cd diffusion layer 302 on n-TnP substrate 301
However, the epitaxial growth process is a one-time process and has one advantage. In this case as well, of course, the active layer is reliably formed buried inside the etching layer 303, so the manufacturing yield of BH-LD with crystal growth reproducibility has improved by more than 50% compared to the conventional example. Even in the BH-LD manufactured by K in this way, I! Nine structures with the same characteristics as those shown in Example 1 were obtained.

なお、上述した実施例においては、1ot−xGax人
37P”7を活性層、InPを基板とし九1μm波長帯
の素子を示したが、これらの半導体材料に限る仁とな(
、GaArAs糸や他の半導体材料でありてもかまわな
い。さらに、実施例においては活性層を埋め込む一部分
を■連形状及び逆メサ形状としたが、こにに限ることな
く、溝の底が平らな台形の形をした溝や他の形状の溝で
あっても差しつかえない。
In addition, in the above-mentioned embodiment, an element with a wavelength band of 91 μm was shown using 1ot-xGax material 37P''7 as an active layer and InP as a substrate, but it is not limited to these semiconductor materials.
, GaArAs thread, or other semiconductor materials. Furthermore, in the examples, the part in which the active layer is embedded was formed into a continuous shape and an inverted mesa shape, but the shape is not limited to this, and the groove may have a trapezoidal shape with a flat bottom or a groove of other shapes. I can't help it.

鱒のエツチングもウェットな化学エツチング法に限るこ
となく、ドライエツチング等の技術を用いてもよい。
Etching of trout is not limited to wet chemical etching, and techniques such as dry etching may also be used.

本発明の特徴は、第2導電型半導体層上に形成された幅
の扶い2本のメサス)ライプによってはさまれた溝が第
2導電型半導体層をつきぬけるように形成され、その溝
部分く活性層を埋め込んで形成したことである。これK
よって幅の狭いメサストライプの上面に活性層が成長し
な−ようにすることができ、溝部分に確実に活性層が埋
め込まれ、結晶成長の再現性が大幅に向上し、BH−L
A feature of the present invention is that a groove sandwiched between two mesa ribs of different widths formed on the second conductivity type semiconductor layer is formed so as to penetrate through the second conductivity type semiconductor layer. This is because the active layer is partially buried. This is K
Therefore, it is possible to prevent the active layer from growing on the top surface of the narrow mesa stripe, and the active layer is reliably buried in the groove portion, greatly improving the reproducibility of crystal growth and improving BH-L.
D

【図面の簡単な説明】[Brief explanation of drawings]

Claims (1)

【特許請求の範囲】 活性層の周囲が当該活性層よ抄も屈折串が小さく、かつ
、エネルギーギャップの大きな半導体材料でおおわれて
−る埋め込みへテロ構造半導体レーザにおいて嬉l導電
握半導体とj12導電蓋半導半導層とが、互いにIII
して形成され、前記#!2導電導電置体導体層本の平行
なメサストライプが形成され、前記2本のメサスジライ
プによってはさまれ九−は、前記IIM2導電置導電体
半導体層ぬけた構造となっており、前記2本のメサスジ
ライプの上面≠を除−て、諺l導電蓋タラッド層および
活性層が、少なくとも濤内部に形成され、さら〆丈 に活性層及びナヂストライプ上金面にわ九りて第2導電
置タラツド層が形成された構造を具備していることを特
徴とする颯め込みヘテ讐構造半導体レーザ。
[Claims] In a buried heterostructure semiconductor laser in which the periphery of an active layer is covered with a semiconductor material that has a smaller refraction angle and a larger energy gap than the active layer, a conductive semiconductor and a J12 conductive semiconductor laser are provided. The lid semiconductor layer and the semiconductor layer are
Formed and said #! Two parallel mesa stripes are formed between the two conductive conductive conductor layers, and the part sandwiched between the two mesa stripes has a structure in which the IIM2 conductive conductor semiconductor layer is removed. Except for the upper surface of the mesa stripe, a conductive top layer and an active layer are formed at least inside the layer, and a second conductive top layer is formed on the active layer and the top surface of the stripe. What is claimed is: 1. A semiconductor laser with a diagonal hetagonal structure, characterized in that it has a structure in which:
JP3205982A 1982-03-01 1982-03-01 Semiconductor laser having embedded heterogeneous structure Pending JPS58148481A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3205982A JPS58148481A (en) 1982-03-01 1982-03-01 Semiconductor laser having embedded heterogeneous structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3205982A JPS58148481A (en) 1982-03-01 1982-03-01 Semiconductor laser having embedded heterogeneous structure

Publications (1)

Publication Number Publication Date
JPS58148481A true JPS58148481A (en) 1983-09-03

Family

ID=12348303

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3205982A Pending JPS58148481A (en) 1982-03-01 1982-03-01 Semiconductor laser having embedded heterogeneous structure

Country Status (1)

Country Link
JP (1) JPS58148481A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4819244A (en) * 1985-06-11 1989-04-04 Sharp Kabushiki Kaisha Semiconductor laser device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4819244A (en) * 1985-06-11 1989-04-04 Sharp Kabushiki Kaisha Semiconductor laser device

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