KR930015003A - DRAM cell structure - Google Patents

DRAM cell structure Download PDF

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Publication number
KR930015003A
KR930015003A KR1019910023449A KR910023449A KR930015003A KR 930015003 A KR930015003 A KR 930015003A KR 1019910023449 A KR1019910023449 A KR 1019910023449A KR 910023449 A KR910023449 A KR 910023449A KR 930015003 A KR930015003 A KR 930015003A
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KR
South Korea
Prior art keywords
dram cell
cell structure
dielectric film
spacer
stack capacitor
Prior art date
Application number
KR1019910023449A
Other languages
Korean (ko)
Other versions
KR940011800B1 (en
Inventor
김성열
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019910023449A priority Critical patent/KR940011800B1/en
Publication of KR930015003A publication Critical patent/KR930015003A/en
Application granted granted Critical
Publication of KR940011800B1 publication Critical patent/KR940011800B1/en

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/102—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including bipolar components

Abstract

내용 없음No content

Description

DRAM 셀 구조DRAM cell structure

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제 1 도는 종래의 스택 캐패시터를 갖는 DRAM 셀 구조도.1 is a diagram of a DRAM cell structure having a conventional stack capacitor.

제 2 도는 본 발명의 DRAM 셀 구조도.2 is a DRAM cell structure diagram of the present invention.

제 3 도는 본 발명의 셀 블록도.3 is a cell block diagram of the present invention.

제 4 도는 본 발명의 스페이서와 1/2Vcc공급 라인이 연결된 상태도.4 is a state in which the spacer and the 1 / 2Vcc supply line of the present invention is connected.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

11 : 워드라인 12 : 유전체막11 word line 12 dielectric film

13 : 스페이서 14 : 유전체막13 spacer 14 dielectric film

15 : 스토리지 노드 16 : 유전체막15: storage node 16: dielectric film

17 : 플레이트 폴리실리콘17: plate polysilicon

Claims (3)

스택캐패시터를 갖는 DRAM 셀에 있어서, 워드라인 표면에 유전체막이 형성되고 워드라인의 측벽의 유전체막에 붙어서 도전성 스페이서가 형성되며, 상기 도전성 스페이서 표면에는 유전체막이 형성되어 스택캐패시터의 노드 전극과의 사이에 2차 캐패시터가 형성되는 것을 특징으로 하는 DRAM 셀 구조.In a DRAM cell having a stack capacitor, a dielectric film is formed on a surface of a word line, and a conductive spacer is formed by adhering to a dielectric film on a sidewall of the word line, and a dielectric film is formed on the surface of the conductive spacer to form a gap between a node and a node electrode of the stack capacitor. A DRAM cell structure, wherein a secondary capacitor is formed. 제 1 항에 있어서, 상기 스페이서는 1/2Vcc 공급라인에 연결되는 것을 특징으로 하는 DRAM 셀 구조.The DRAM cell structure of claim 1, wherein the spacer is connected to a 1 / 2Vcc supply line. 제 1 항에 있어서, 상기 스페이서는 스택캐패시터의 플레이트, 폴리 실리콘에 연결되는 것을 특징으로 하는 DRAM 셀 구조.The DRAM cell structure of claim 1, wherein the spacer is connected to a plate of a stack capacitor and polysilicon. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910023449A 1991-12-19 1991-12-19 Structure of dram cell KR940011800B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910023449A KR940011800B1 (en) 1991-12-19 1991-12-19 Structure of dram cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910023449A KR940011800B1 (en) 1991-12-19 1991-12-19 Structure of dram cell

Publications (2)

Publication Number Publication Date
KR930015003A true KR930015003A (en) 1993-07-23
KR940011800B1 KR940011800B1 (en) 1994-12-26

Family

ID=19325197

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910023449A KR940011800B1 (en) 1991-12-19 1991-12-19 Structure of dram cell

Country Status (1)

Country Link
KR (1) KR940011800B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160093858A (en) 2015-01-30 2016-08-09 (주) 에너텍 Convection oven

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160093858A (en) 2015-01-30 2016-08-09 (주) 에너텍 Convection oven

Also Published As

Publication number Publication date
KR940011800B1 (en) 1994-12-26

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