KR920003519A - Stacked Cell Manufacturing Method and Structure - Google Patents
Stacked Cell Manufacturing Method and Structure Download PDFInfo
- Publication number
- KR920003519A KR920003519A KR1019900010604A KR900010604A KR920003519A KR 920003519 A KR920003519 A KR 920003519A KR 1019900010604 A KR1019900010604 A KR 1019900010604A KR 900010604 A KR900010604 A KR 900010604A KR 920003519 A KR920003519 A KR 920003519A
- Authority
- KR
- South Korea
- Prior art keywords
- stacked cell
- polysilicon
- source drain
- drain junction
- cell manufacturing
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 6
- 229920005591 polysilicon Polymers 0.000 claims 6
- 125000006850 spacer group Chemical group 0.000 claims 3
- 239000003990 capacitor Substances 0.000 claims 2
- 238000002955 isolation Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
- H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제2도(A)∼(G)는 본 발명에 따른 적층형 셀 제조 공정도.2 (A) to (G) show a stacked cell manufacturing process according to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900010604A KR930011544B1 (en) | 1990-07-13 | 1990-07-13 | Method of fabricating for stacked cell |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900010604A KR930011544B1 (en) | 1990-07-13 | 1990-07-13 | Method of fabricating for stacked cell |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920003519A true KR920003519A (en) | 1992-02-29 |
KR930011544B1 KR930011544B1 (en) | 1993-12-10 |
Family
ID=19301203
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900010604A KR930011544B1 (en) | 1990-07-13 | 1990-07-13 | Method of fabricating for stacked cell |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930011544B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100329748B1 (en) * | 1995-05-22 | 2002-08-27 | 주식회사 하이닉스반도체 | Mosfet having ldd structure for preventing drain junction leakage |
-
1990
- 1990-07-13 KR KR1019900010604A patent/KR930011544B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100329748B1 (en) * | 1995-05-22 | 2002-08-27 | 주식회사 하이닉스반도체 | Mosfet having ldd structure for preventing drain junction leakage |
Also Published As
Publication number | Publication date |
---|---|
KR930011544B1 (en) | 1993-12-10 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
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J2X1 | Appeal (before the patent court) |
Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL |
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G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20051116 Year of fee payment: 13 |
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LAPS | Lapse due to unpaid annual fee |