KR930012462U - 멀티 동기 신호처리 회로 - Google Patents

멀티 동기 신호처리 회로

Info

Publication number
KR930012462U
KR930012462U KR2019910019678U KR910019678U KR930012462U KR 930012462 U KR930012462 U KR 930012462U KR 2019910019678 U KR2019910019678 U KR 2019910019678U KR 910019678 U KR910019678 U KR 910019678U KR 930012462 U KR930012462 U KR 930012462U
Authority
KR
South Korea
Prior art keywords
signal processing
processing circuit
synchronous signal
multi synchronous
circuit
Prior art date
Application number
KR2019910019678U
Other languages
English (en)
Other versions
KR940006822Y1 (ko
Inventor
성일경
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019910019678U priority Critical patent/KR940006822Y1/ko
Publication of KR930012462U publication Critical patent/KR930012462U/ko
Application granted granted Critical
Publication of KR940006822Y1 publication Critical patent/KR940006822Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/08—Separation of synchronising signals from picture signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Studio Circuits (AREA)
KR2019910019678U 1991-11-16 1991-11-16 멀티 동기 신호처리 회로 KR940006822Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910019678U KR940006822Y1 (ko) 1991-11-16 1991-11-16 멀티 동기 신호처리 회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910019678U KR940006822Y1 (ko) 1991-11-16 1991-11-16 멀티 동기 신호처리 회로

Publications (2)

Publication Number Publication Date
KR930012462U true KR930012462U (ko) 1993-06-25
KR940006822Y1 KR940006822Y1 (ko) 1994-10-01

Family

ID=19322357

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910019678U KR940006822Y1 (ko) 1991-11-16 1991-11-16 멀티 동기 신호처리 회로

Country Status (1)

Country Link
KR (1) KR940006822Y1 (ko)

Also Published As

Publication number Publication date
KR940006822Y1 (ko) 1994-10-01

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