KR930011672A - Flat Panel Display - Google Patents

Flat Panel Display Download PDF

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Publication number
KR930011672A
KR930011672A KR1019910020695A KR910020695A KR930011672A KR 930011672 A KR930011672 A KR 930011672A KR 1019910020695 A KR1019910020695 A KR 1019910020695A KR 910020695 A KR910020695 A KR 910020695A KR 930011672 A KR930011672 A KR 930011672A
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KR
South Korea
Prior art keywords
data
generating
latch
horizontal
signals
Prior art date
Application number
KR1019910020695A
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Korean (ko)
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KR940004554B1 (en
Inventor
김정혜
Original Assignee
김정배
삼성전관 주식회사
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Priority to KR1019910020695A priority Critical patent/KR940004554B1/en
Publication of KR930011672A publication Critical patent/KR930011672A/en
Application granted granted Critical
Publication of KR940004554B1 publication Critical patent/KR940004554B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/66—Transforming electric information into light information

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

내용 없음No content

Description

평판형 디스플레이장치Flat Panel Display

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 종래의 평판형 디스플레이장치의 디스플레이 화면제어 블럭도를 나타내는 것이다.1 shows a display screen control block diagram of a conventional flat panel display apparatus.

제2도는 본 발명에 따른 평판형 디스플레이장치의 수평 디스플레이 위치조정회로의 블럭도를 나타내는 것이다.2 is a block diagram of a horizontal display positioning circuit of the flat panel display device according to the present invention.

제3도는 본 발명에 따른 일실시예의 평판형 디스플레이장치의 수평 디스플레이 위치조정회로를 나타내는 것이다.3 shows a horizontal display positioning circuit of a flat panel display device according to an embodiment of the present invention.

제4도는 제3도의 회로의 동작을 설명하기 위한 타이밍도를 나타내는 것이다.4 is a timing diagram for explaining the operation of the circuit of FIG.

Claims (2)

입력신호를 받아 데이타와 관련된 신호들을 발생시키는 데이타변환부와, 상기 데이타에 관련되는 휘도신호를 발생시키는 데이타제어부와, 상기 데이타변환부로부터의 신호에 해당하는 휘도신호를 발생시키는 데이타구동부와, 스캔제어 동기신호를 발생시키는 스캔제어부와, 상기 스캔제어부에 의해서 스캔을 구동하는 스캔구동부를 구비한 평판형 디스플레이장치에 있어서, 상기 데이타변환부와 상기 데이타제어부 사이에 데이타의 수평 디스플레이 위치조정을 하는 수평 디스플레이 위치조정회로를 구비한 것을 특징으로 하는 평판형 디스플레이장치.A data converter for receiving input signals and generating signals related to data, a data controller for generating luminance signals related to the data, a data driver for generating luminance signals corresponding to signals from the data converter, and scanning A flat panel display device comprising a scan controller for generating a control synchronization signal and a scan driver for driving a scan by the scan controller, wherein the horizontal display position of the data is adjusted between the data converter and the data controller. A flat panel display device comprising a display positioning circuit. 제1항에 있어서, 상기 수평 디스플레이 위치조정회로는 입력모드에 따라 데이타 클럭변환형태를 선택하는 선택회로와, 상기 선택회로에 의해 결정된 변환데이타 클럭을 받아 수평조정이 필요한 모드인가 아닌가를 선택하는 데이타변환부와, 수평조정이 필요한 모드인 경우, 조정가능영역을 설정하고 그에 따라 결정되는 래치클럭을 입력하는 래치발생부와, 상기 래치발생부로부터의 신호를 입력하여 변환된 래치클럭을 만들어 내는 수평조정신호발생부와, 상기 선택회로와 상기 수평조정신호발생부로 부터의 신호를 입력하여 상기 래치클럭을 조정하여 상기 데이타제어부에 출력하는 래치조정부를 구비한 것을 특징으로 하는 평판형 디스플레이장치.2. The horizontal display position adjusting circuit of claim 1, wherein the horizontal display position adjusting circuit selects a data clock conversion type according to an input mode, and receives a conversion data clock determined by the selecting circuit, and selects whether or not a mode is required for horizontal adjustment. A converting unit, a latch generating unit for setting an adjustable area and inputting a latch clock determined according to the mode required for horizontal adjustment; and a horizontal generating inputting a signal from the latch generating unit to produce a converted latch clock And a latch adjustment section for inputting signals from the selection circuit and the horizontal adjustment signal generation section to adjust the latch clock and output the signal to the data control section. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910020695A 1991-11-20 1991-11-20 Flat display apparatus KR940004554B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910020695A KR940004554B1 (en) 1991-11-20 1991-11-20 Flat display apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910020695A KR940004554B1 (en) 1991-11-20 1991-11-20 Flat display apparatus

Publications (2)

Publication Number Publication Date
KR930011672A true KR930011672A (en) 1993-06-24
KR940004554B1 KR940004554B1 (en) 1994-05-25

Family

ID=19323131

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019910020695A KR940004554B1 (en) 1991-11-20 1991-11-20 Flat display apparatus

Country Status (1)

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KR (1) KR940004554B1 (en)

Also Published As

Publication number Publication date
KR940004554B1 (en) 1994-05-25

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