KR920017439A

KR920017439A - Size reduction device for image documents

Info

Publication number: KR920017439A
Application number: KR1019910002874A
Authority: KR
Inventors: 박용우; 이흥직
Original assignee: 정용문; 삼성전자 주식회사
Priority date: 1991-02-22
Filing date: 1991-02-22
Publication date: 1992-09-26
Also published as: KR930005129B1

Abstract

내용 없음No content

Description

Size reduction device for image documents

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 팩시밀리 시스템의 블록구성도,1 is a block diagram of a facsimile system according to the present invention,

제2도는 제1도중 축소 카운터부(50)의 구체블럭도,2 is a concrete block diagram of the reduction counter unit 50 in FIG.

제3도는 제2도중 수평축소 카운터부(51)의 구체회로도,3 is a concrete circuit diagram of the horizontal reduction counter unit 51 in FIG.

제4도는 제5도중 수직축소 카운터부(52)의 구체회로도.4 is a concrete circuit diagram of the vertical reduction counter unit 52 in FIG.

Claims

CPU 10 for controlling the overall operation of the facsimile, a scanner clock generator 20 for generating various control clock signals under the control of the CPU 10, and control generated by the scanner clock generator 20 A facsimile document size reduction apparatus having a scanner 40 for reading image data by a clock, comprising: a mode selection unit 30 for selecting a reduction size conversion ratio of an original, and the scanner clock generator 20 A reduction counter unit 50 for reducing an original size according to a selection ratio of the mode selection unit 30 by inputting a control clock signal output from the control unit; and inputting image data read from the scanner 40 to the reduction counter. And a DMA matching section (60) for processing the data reduced by the clock signal reduced by the section (50) at high speed.

The apparatus according to claim 1, wherein the reduction counter unit 50 comprises a horizontal reduction counter 51 for reducing horizontal pixels and a vertical reduction counter 52 for reducing vertical lines. .

The counter of claim 2, wherein the horizontal reduction counter 51 inputs a first clock CLK1 signal to count horizontal pixels at a predetermined number of cycles, and a first clock CLK1 signal. A pixel removal means for removing horizontal pixels with a predetermined number of periods counted by the counting means by synchronizing the counted value by the means with the second clock CLK2, and inputting a signal synchronized with the second clock by the pixel removing means. And a load signal generating means for generating a load signal so as to have a predetermined number of periods and providing the counting means to the counting means.

3. The second counting means according to claim 2, wherein the vertical reduction counter 52 inputs an end-of-line (EOL) signal to count the vertical lines at a predetermined number of periods, and synchronizes the third clock with the value counted by the counting means. Line removal means for removing a vertical line at a predetermined number of periods counted by the counting means, and a load signal generated to receive a signal synchronized with a third clock by the line removal means to have a predetermined number of periods to generate the second line. A document size reduction device, comprising: a load signal generating means provided to a counting means.

4. An apparatus according to claim 3, wherein the predetermined number of periods of the first counting means is one cycle of 7, 6, 6, and 6 pixels.

※ Note: The disclosure is based on the initial application.