KR920013919A - Series comparator integrated circuit - Google Patents

Series comparator integrated circuit Download PDF

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Publication number
KR920013919A
KR920013919A KR1019900020709A KR900020709A KR920013919A KR 920013919 A KR920013919 A KR 920013919A KR 1019900020709 A KR1019900020709 A KR 1019900020709A KR 900020709 A KR900020709 A KR 900020709A KR 920013919 A KR920013919 A KR 920013919A
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KR
South Korea
Prior art keywords
inputs
comparator
integrated circuit
output
nmoss
Prior art date
Application number
KR1019900020709A
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Korean (ko)
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KR940000267B1 (en
Inventor
김용배
Original Assignee
문정환
금성일렉트론 주식회사
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Priority to KR1019900020709A priority Critical patent/KR940000267B1/en
Publication of KR920013919A publication Critical patent/KR920013919A/en
Application granted granted Critical
Publication of KR940000267B1 publication Critical patent/KR940000267B1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)

Abstract

내용 없음No content

Description

직렬 비교기 집적회로Series comparator integrated circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 따른 직렬 비교기 회로도, 제4도는 제3도에서 첫번째 비교기 내부회로도, 제5도는 제3도에서 두번째 이후의 비교기 내부 회로도.3 is a circuit diagram of a series comparator according to the present invention, FIG. 4 is a circuit diagram of the first comparator in FIG. 3, and FIG. 5 is a circuit diagram of the comparator after the second in FIG.

Claims (4)

두입력이 같을 경우 하이임피던스 상태를 출력하고 다를경우 논리값을 출력하는 첫번째 비교기와, 상기 첫번째 비교기와 동일하게 동작하되 두입력이 같을 경우 전단의 논리값을 전달하는 N개의 비교기를 직렬 연결하여 구성한 것을 특징으로 하는 직렬 비교기 집적회로.The first comparator outputs the high impedance state when the two inputs are the same, and the logic value is output when the two inputs are different, and the N comparator operates in the same way as the first comparator. And a series comparator integrated circuit. 제1항에 있어서, 첫번째 비교기는 한 입력에 대해 상반동작을 하는 엔모스 각각을 두입력에 대해서도 상반 동작을 하는 2개의 엔모스 끼리 직렬 연결하되 직렬 연결된 2개의 엔모스 각각은 전원전압과 그라운드에 연결되어 두입력에 따른 논리값을 출력하도록 구성한 것을 특징으로 하는 직렬 비교기 집적회로.2. The first comparator is to connect the NMOSs that perform the opposite operation with respect to one input to two NMOSs that perform the opposite operation with respect to the two inputs, each of which is connected to the power supply voltage and the ground. And a series comparator integrated circuit configured to output a logic value according to two inputs. 제1항에 있어서, 첫번째 비교기 이후의 비교기는, 한입력에 대해 상반동작을 하는 엔모스 각각을 두입력에 대해서도 상반동작을 하는 2개의 엔모스끼리 직렬 연결하고, 직렬 연결된 2개의 엔모스 각각은 전원전압과 그라운드에 연결되어 두 입력에 따른 논리값을 출력하도록하되 두입력이 같을 경우 전단의 출력을 다음단으로 전달하도록 엔모스를 연결 구성한 것을 특징으로 하는 직렬 비교기 집적회로.The comparator of claim 1, wherein the comparators after the first comparator connect each of the NMOSs that perform the opposite operation with respect to one input to two NMOSs that perform the opposite operation with respect to the two inputs. A serial comparator integrated circuit, connected to a power supply voltage and ground, to output a logic value according to two inputs, but configured to connect an NMOS to transfer the output of the front end to the next stage when the two inputs are the same. 제1항 또는 제3항에 있어서, 두입력이 같을 경우 전단의 출력을 다음단으로 전달하는 엔모스는, 두입력에 대해 동일 동작을 하는 엔모스를 직렬 연결한 후 각 입력에 대해서는 상반동작을 하는 엔모스 끼리 병렬 연결하여 두입력이 같을때 전단의 출력을 다음단으로 전달하도록 구성한 것을 특징으로 하는 직렬 비교기 집적회로.4. The NMOS according to claim 1 or 3, wherein the NMOS, which transmits the output of the front end to the next stage when the two inputs are the same, performs an opposite operation on each input after connecting NMOSs that perform the same operation for the two inputs in series. The serial comparator integrated circuit, characterized in that configured to transfer the output of the front end to the next stage when the two inputs are connected in parallel to each other. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900020709A 1990-12-15 1990-12-15 Serial comparator ic KR940000267B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900020709A KR940000267B1 (en) 1990-12-15 1990-12-15 Serial comparator ic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900020709A KR940000267B1 (en) 1990-12-15 1990-12-15 Serial comparator ic

Publications (2)

Publication Number Publication Date
KR920013919A true KR920013919A (en) 1992-07-30
KR940000267B1 KR940000267B1 (en) 1994-01-12

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ID=19307606

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900020709A KR940000267B1 (en) 1990-12-15 1990-12-15 Serial comparator ic

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KR (1) KR940000267B1 (en)

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Publication number Publication date
KR940000267B1 (en) 1994-01-12

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