KR920008038B1 - Pbtio3 film manufacturing method on silicon substrate - Google Patents

Pbtio3 film manufacturing method on silicon substrate Download PDF

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KR920008038B1
KR920008038B1 KR1019900005604A KR900005604A KR920008038B1 KR 920008038 B1 KR920008038 B1 KR 920008038B1 KR 1019900005604 A KR1019900005604 A KR 1019900005604A KR 900005604 A KR900005604 A KR 900005604A KR 920008038 B1 KR920008038 B1 KR 920008038B1
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pbtio3
silicon substrate
thin film
silicon
substrate
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KR910019150A (en
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홍찬희
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금성일렉트론 주식회사
문정환
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

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Abstract

This thin film is formed by (1) forming a silicide to reduce the contact resistance and to improve adhesion between the silicon and titanium interface by sputtering titanium element, 1,000-2,500 angstrom thick deposition on the silicon substrate, (2) heat treating in the temperature range of 350-500 deg.C under nitrogen (N2) atmosphere, (3) evaporating lead or lead oxide, (4) bubbling Ti (C2H4O)4 with N2 (nitrogen) gas, (5) heating the substrate constantly, (6) reacting the titanium on the silicon substrate with oxygen (O2) gas. Then high purity lead titanate thin film is obtained.

Description

실리콘 기판위의 PbTiO3박막 제조방법Method for manufacturing PbTiO3 thin film on silicon substrate

제1도는 종래의 PbTiO3박막 제조공정도.1 is a conventional PbTiO 3 thin film manufacturing process chart.

제2도는 본 발명에 따른 PbTiO3박막 제조공정도.2 is a manufacturing process diagram of PbTiO 3 thin film according to the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 실리콘기판 2 : Pt층1: silicon substrate 2: Pt layer

3 : PbTiO3박막 4 : Ti층3: PbTiO3 thin film 4: Ti layer

5 : Ti실리사이드5: Ti silicide

본 발명은 실리콘 기판상에 PbTiO3를 성장시키는 방법에 관한 것으로 특히 실리콘 기판위의 Ti(티타늄) Pb(납)을 직접 반응시켜 제작하여 메모리소자의 SiO2(이산화실리콘) 박막의 대체에 적합하도록한 실리콘 기판위의 PbTiO3박막 제조방법에 관한 것이다. 종래의 PbTiO3의 박막 형성 공정에는 스포터링 방법과 CVD 이온 비임 스포터링(sputtering) 방식등으로 제조하였다.The present invention relates to a method of growing PbTiO3 on a silicon substrate, and in particular, a silicon made by directly reacting Ti (titanium) Pb (lead) on a silicon substrate to be suitable for replacing a SiO2 (silicon dioxide) thin film of a memory device. A method for producing a PbTiO 3 thin film on a substrate. In the conventional thin film formation process of PbTiO3, it was manufactured by a spottering method, a CVD ion beam sputtering method, or the like.

PbTiO3의 기판으로서는 Pt(백금)MgO등이 이용되었으며 이는 스포터링이나 CVD 공정중에 Pb와의 반응을 억제하기 위한 것이다. 스포터링 방식으로 박막을 제조할 경우 PbTiO3의 세라믹(ceramic) 제조공정을 거쳐 타기트(Target)물질을 만들며 CVD의 경우 PbO의 증발과 Ti(C2H4O)4를 증발시켜 O2분위기에서 PbTiO3를 형성하는 것이다. CVD 방법을 사용할 경우 그 반응식을 보면 PbO+Ti+O2→PbTiO3이다. 이렇게 생성된 박막은 유전율이 100~200에 이르며 SiO2유전율 3.9에 비하여 25~50배에 이른다.Pt (Platinum) MgO and the like have been used as the substrate of PbTiO3, and this is to suppress the reaction with Pb during the spotting or CVD process. When producing a thin film by spokes gettering way through the ceramic (ceramic) production process of PbTiO 3 makes the ride agent (Target) material for CVD to evaporate the PbO evaporation and Ti (C2H4O) 4 for forming a PbTiO3 in O2 atmosphere will be. In the case of using the CVD method, the reaction equation is PbO + Ti + O2 → PbTiO3. The thin film thus formed has a dielectric constant of 100 to 200 and is 25 to 50 times higher than that of SiO 2 dielectric constant of 3.9.

이를 정전용량(capacitance)값에 적용하면

Figure kpo00001
에서 같은 면적에 정전용량(capacitance)을 25∼50배를 증가시킬 수 있다.If you apply this to the capacitance value
Figure kpo00001
In the same area, the capacitance can be increased by 25 to 50 times.

PbTiO3를 실리콘 기판에 증착시킬 경우 실리콘이 분위기 가스인 O2(산소)와 결합하여 실리콘 계면에 SiO2가 형성되어 순수 PbTiO3를 얻기가 대단히 어려우며 또한 SiO2와 직렬 연결되어 정전용량이 크게 감소한다.When PbTiO3 is deposited on a silicon substrate, it is very difficult to obtain pure PbTiO3 by combining silicon with O2 (oxygen), which is an atmospheric gas, to form pure PbTiO3 at the silicon interface.

그리고 정전용량이 크게 감소하는 것을 방지하기 위해 실리콘 기판위에 Pt(백금)(2)을 서포터링하여 PbTiO3박막(3)을 형성하는 방법이 적용된다.In order to prevent the capacitance from being greatly reduced, a method of forming a PbTiO 3 thin film 3 by supporting Pt (platinum) 2 on a silicon substrate is applied.

그런데 상기와 같은 종래의 방식으로 고유전박막인 PbTiO3를 형성할 경우 실리콘 계면에서 접착력이 약하며 또한 분위긴 가스인 O2와 실리콘이 반응하여 정전용량이 감소하고 또 정전용량이 감소하는 것을 방지하기 위하여 백금을 먼저 형성시켜 PbTiO3박막을 형성하나 역시 Pt(백금)와 PbTiO3의 계면에서의 접착력이 떨어질 뿐만아니라 Pt(백금) 증착시 두께가 증가하게 되는 단점이 있었다.However, when forming the high dielectric thin film PbTiO3 by the conventional method as described above, platinum is weak at the silicon interface and platinum is reacted to prevent the capacitance and the capacitance from decreasing by reacting silicon with O2, which is a long gas. Was formed first to form a PbTiO3 thin film, but also had a disadvantage in that the adhesion at the interface between Pt (platinum) and PbTiO3 was reduced and the thickness increased when Pt (platinum) was deposited.

본 발명은 이러한 단점을 해결하기 위하여 제2도에 도시된 바와같이 실리콘(1) 기판상에 Ti(티타늄)(4)을 1000∼2500Å 스포터링으로 입힌후 350∼500℃의 N2(질소) 분위기에서 실리콘(1)과 Ti층(티타늄층)(4) 계면사이에 Ti실리사이드(5)를 형성시켜 실리콘(1)과 Ti층(4) 사이의 접촉저항을 감소시키면서 두물질간의 접착력을 향상시킨다.In order to solve this disadvantage, the present invention is coated with Ti (Titanium) 4 on a silicon (1) substrate with 1000 to 2500 microwatts of spotting, as shown in FIG. Ti silicide (5) is formed between the silicon (1) and the Ti layer (titanium layer) 4 interface to improve the adhesion between the two materials while reducing the contact resistance between the silicon (1) and the Ti layer (4). .

이때 1000∼1200℃ 사이에 Pb(납) 혹은 PbO를 증발시키고 Ti(C2H5O)를 N2 가스로 버블링(Bubbling)하며 기판온도를 450∼700℃로 가열하여 반응시킨다.At this time, Pb (lead) or PbO is evaporated between 1000-1200 ° C, bubbling Ti (C2H5O) with N2 gas, and the substrate temperature is heated to 450-700 ° C for reaction.

이때 실리콘기판(1)상의 Ti는 Pb와 분위기 가스 O2와 반응하여 실리사이드(Silicide)(5)가 형성된 부위까지 반응하여 간다.At this time, Ti on the silicon substrate 1 reacts with Pb and the atmosphere gas O2 to the site where the silicide 5 is formed.

상기와 같은 방법으로 제작된 PbTiO3박막(3)은 실리콘기판(1)에 SiO2를 전혀 형성치 않으며 PbTiO3의 고유유전율 100∼200을 아무런 손실없이 얻을 수 있다.The PbTiO3 thin film 3 produced by the above method does not form SiO2 on the silicon substrate 1 at all, and the dielectric constant of PbTiO3 100 to 200 can be obtained without any loss.

또한 실리콘 기판(1)상의 Ti와 직접반응케하여 양질의 PbTiO3(3)를 제조하며 실리콘과의 계면에서 발생되는 접촉 저항을 실리사이드(5)로 해결함과 동시에 접착력을 향상하게 되고 또 본 발명으로 제작된 PbTiO3는 SiO2에 비해 정전용량을 25∼50배로 증가시켜 작은 면적에서도 높은 정전용량을 얻는다.In addition, by directly reacting with Ti on the silicon substrate (1) to produce a high-quality PbTiO3 (3) and to solve the contact resistance generated at the interface with the silicon with the silicide (5) and at the same time improve the adhesion The prepared PbTiO3 increases the capacitance by 25 to 50 times compared to SiO2 to obtain high capacitance even in a small area.

따라서 본 발명은 실리콘 기판상에 PbTiO3 고유전 박막을 직접 제조할 수 있도록 고안하므로써 메모리 소자의 SiO2의 대체물질로 사용할 수 있어 스택(stack) 혹은 트렌치(trench)공정을 이용하여 유효면적의 증가로 정전용량을 증가시키려는 복잡한 방법을 간소화할 수 있다.Therefore, the present invention is designed to manufacture PbTiO3 high-k dielectric thin film directly on a silicon substrate, so that it can be used as a substitute for SiO2 in memory devices, and can be electrostatically increased by increasing the effective area using a stack or trench process. You can simplify the complex ways of increasing capacity.

Claims (1)

실리콘기판(1)에 Ti(4)를 스포터링으로 증착하여 일정온도의 N2분위기에서 열처리하여 실리콘과 Ti계면에 실리사이드(5)를 형성하는 단계와, 상기와 같이 실리사이드(5)를 형성한후 Pb 또는 PbO를 증발시키고 Ti(C2H5O)4를 N2가스로 버블링한뒤 기판온도를 일정하게 가열하고 분위기 가스 O2를 사용하여 실리콘 기판상의 Ti와 반응시켜 순수한 PbTiO3를 얻도록 하는 것을 특징으로 하는 실리콘 기판위의 PbTiO3박막 제조방법.Depositing Ti (4) on the silicon substrate (1) by spottering and heat-treating in a N2 atmosphere at a predetermined temperature to form silicide (5) on the silicon and Ti interface, and then forming the silicide (5) as described above. After evaporating Pb or PbO and bubbling Ti (C2H5O) 4 with N2 gas, the substrate temperature is constantly heated and reacted with Ti on the silicon substrate using atmospheric gas O2 to obtain pure PbTiO3. Method for manufacturing PbTiO3 thin film on a substrate.
KR1019900005604A 1990-04-20 1990-04-20 Pbtio3 film manufacturing method on silicon substrate KR920008038B1 (en)

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