KR920003465A - Sidewall spacer formation method using thermal oxide film - Google Patents

Sidewall spacer formation method using thermal oxide film Download PDF

Info

Publication number
KR920003465A
KR920003465A KR1019900010427A KR900010427A KR920003465A KR 920003465 A KR920003465 A KR 920003465A KR 1019900010427 A KR1019900010427 A KR 1019900010427A KR 900010427 A KR900010427 A KR 900010427A KR 920003465 A KR920003465 A KR 920003465A
Authority
KR
South Korea
Prior art keywords
oxide film
sidewall spacer
forming
thermal oxide
formation method
Prior art date
Application number
KR1019900010427A
Other languages
Korean (ko)
Other versions
KR950005044B1 (en
Inventor
김홍선
허윤종
Original Assignee
문정환
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 문정환, 금성일렉트론 주식회사 filed Critical 문정환
Priority to KR1019900010427A priority Critical patent/KR950005044B1/en
Publication of KR920003465A publication Critical patent/KR920003465A/en
Application granted granted Critical
Publication of KR950005044B1 publication Critical patent/KR950005044B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Volatile Memory (AREA)

Abstract

내용 없음No content

Description

열적산화막을 이용한 측벽 스페이서 형성방법Sidewall spacer formation method using thermal oxide film

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명의 공정 단면도.2 is a cross-sectional view of the process of the present invention.

Claims (1)

게이트 산화층/다결정 실리콘층/LTO(또는 HTO)층을 차례로 형성하는 단계와, LTO(또는 HTO)층위에 원하는 게이트의 크기보다 조금 더 크게 한정하여 게이트를 형성하는 포토/에치 단계와, 형성된 게이트의 측면을 낮은 온도에서 열적으로 산화시켜 균등한 산화막을 형성하는 단계와, 열적 산화막을 수직에치하여 측벽 스에이서를 형성하는 단계로 이루어짐을 특징으로 하는 열적산화막을 이용한 측벽 스페이서 형성방법.Forming a gate oxide layer / polycrystalline silicon layer / LTO (or HTO) layer in sequence, forming a gate on the LTO (or HTO) layer by a little larger than the desired gate size, and forming a gate A method of forming a sidewall spacer using a thermally oxidized film comprising thermally oxidizing a side surface at a low temperature to form an even oxide film, and forming a sidewall spacer by vertically etching the thermal oxide film. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900010427A 1990-07-10 1990-07-10 Manufacturing method of side wall spacer using thermal oxide KR950005044B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900010427A KR950005044B1 (en) 1990-07-10 1990-07-10 Manufacturing method of side wall spacer using thermal oxide

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900010427A KR950005044B1 (en) 1990-07-10 1990-07-10 Manufacturing method of side wall spacer using thermal oxide

Publications (2)

Publication Number Publication Date
KR920003465A true KR920003465A (en) 1992-02-29
KR950005044B1 KR950005044B1 (en) 1995-05-17

Family

ID=19301095

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900010427A KR950005044B1 (en) 1990-07-10 1990-07-10 Manufacturing method of side wall spacer using thermal oxide

Country Status (1)

Country Link
KR (1) KR950005044B1 (en)

Also Published As

Publication number Publication date
KR950005044B1 (en) 1995-05-17

Similar Documents

Publication Publication Date Title
KR890015355A (en) Manufacturing Method of Semiconductor Device
KR890003037A (en) UV-erasing nonvolatile semiconductor device
KR920003465A (en) Sidewall spacer formation method using thermal oxide film
KR890007400A (en) Trench Etching
KR880002125A (en) Magnetic head
KR920005296A (en) Semiconductor Device Separation Manufacturing Method
JPS53129981A (en) Production of semiconductor device
KR930014896A (en) Manufacturing method of DRAM cell
KR920013743A (en) Gate Forming Method Using Thermal Oxidation Process
KR890005851A (en) Device Separation Method of Semiconductor Device
KR920007086A (en) How to Form Sidewall Spacers
KR930014839A (en) Heat treatment method of the sample using laser
KR920013600A (en) Method of forming planar isolation region of semiconductor device
KR910013514A (en) Method of manufacturing device isolation oxide film of semiconductor device
JPS52104867A (en) High frequency transistor
KR900002432A (en) Method of forming side wall of semiconductor
KR920011436A (en) Transistor Manufacturing Method
JPS5378169A (en) Manufacture of semiconductor device
KR920005369A (en) Reset gate manufacturing method
JPS52147983A (en) Insulation gate type semiconductor device
KR840001388A (en) Manufacturing Method of Semiconductor Device
KR960026620A (en) Semiconductor Device Separation Method Using Voids
KR930014885A (en) Device Separation Method of Semiconductor Device
KR920001654A (en) Trenchfield Oxide Manufacturing Method
KR910008802A (en) Manufacturing Method of Semiconductor Device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application
J2X1 Appeal (before the patent court)

Free format text: APPEAL AGAINST DECISION TO DECLINE REFUSAL

G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20090427

Year of fee payment: 15

LAPS Lapse due to unpaid annual fee