KR910016188A - Raster Size Control Circuit - Google Patents

Raster Size Control Circuit Download PDF

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Publication number
KR910016188A
KR910016188A KR1019900001289A KR900001289A KR910016188A KR 910016188 A KR910016188 A KR 910016188A KR 1019900001289 A KR1019900001289 A KR 1019900001289A KR 900001289 A KR900001289 A KR 900001289A KR 910016188 A KR910016188 A KR 910016188A
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KR
South Korea
Prior art keywords
output
unit
deflection
resistor
diode
Prior art date
Application number
KR1019900001289A
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Korean (ko)
Other versions
KR920009344B1 (en
Inventor
신욱희
Original Assignee
정용문
삼성전자 주식회사
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Publication date
Application filed by 정용문, 삼성전자 주식회사 filed Critical 정용문
Priority to KR1019900001289A priority Critical patent/KR920009344B1/en
Publication of KR910016188A publication Critical patent/KR910016188A/en
Application granted granted Critical
Publication of KR920009344B1 publication Critical patent/KR920009344B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/16—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by deflecting electron beam in cathode-ray tube, e.g. scanning corrections

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

내용 없음No content

Description

라스터 사이즈 조절회로Raster Size Control Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 구체회로도.1 is a specific circuit diagram of the present invention.

Claims (2)

라스터 사이즈 조절회로에 있어서, 수평드라이브단의 출력을 입력받아 증폭하여 출력하는 수평출력 및 편향부(10)와, 상기 수평출력 및 편향부(10)의 출력신호를 동일한 신호로 검출하는 편향신호검출부(20)와, 상기 편향신호검출부(20)의 출력되는 신호를 정류평활하는 정류부(30)와, 상기 정류부(30)의 출력신호를 감쇠하는 감쇠부(40)와, 상기 감쇠부(40)의 출력신호를 소정의 기준값과 비교하여 비교값을 출력하는 비교부(50)와, 상기 소정의 기준값을 발생하는 기준설정부(60) 상기 비교부(50)의 출력을 전압증폭하는 전압증폭부(70)와, 상기 전압증폭부(70)의 출력을 전류증폭하여 상기 수평출력부(10)의 전원을 제어하는 전류증폭부(80)로 구성됨을 특징으로 하는 회로.In the raster size control circuit, a deflection signal for detecting an output signal of the horizontal output and deflection unit 10 and an output signal of the horizontal output and deflection unit 10 for receiving and amplifying and outputting the output of the horizontal drive stage. A rectifier 30 for rectifying and smoothing the signal output from the deflection signal detector 20, attenuator 40 for attenuating the output signal of the rectifier 30, and the attenuator 40 A comparison unit 50 for outputting a comparison value by comparing the output signal of the control unit with a predetermined reference value, and a voltage amplification unit for voltage amplifying the output of the comparison unit 50, the reference setting unit 60 generating the predetermined reference value. And a current amplifier (80) for controlling the power of the horizontal output unit (10) by amplifying the output of the voltage amplification unit (70). 상기 제1항에 있어서, 상기 수평출력 및 편향부(10)는 증폭 트랜지스터(Q1) 및 댐핑다이오드(D1) 및 캐패시터(C1,C2,C3)및 가변코일(VL1)및 트랜스(T2)및 편향코일(H-DY)로 구성되고, 상기 편향신호 검출부(20)는 캐패시터(C3) 및 트랜스(T1)로 구성되며 상기 정류부(30)는 다이오드(D2) 및 평활캐패시터(C4)및 부하저항(R1)로 구성되고, 감쇠부(40)는 구형저항 감쇠기(R2, R3, R4)및 가변저항(VR1)으로 구성되고, 비교부(50)는 저항(R5-R10)및 캐패시터(C5-C8)및 다이오드(D3) 및 제너다이오드(ZD1)및 오피앰프로 구성되며, 상기 기준설정부(60)는 제너다이오드(ZD1)및 저항(R9,R10)를 구성된다. 에미터 안정저항(R12) 및 바이어스저항 (R11)로 구성되고, 전류증폭부(80)는 베이스저항(R10) 및 증폭드라이브 트랜지스터(Q3) 및 전류증폭 트랜지스터 (Q4)및 트랜지스터 보호 다이오드 (D4)및 전류차단 저항(R14)로 구성됨을 특징으로 하는 라스터 사이즈 조절회로.2. The horizontal output and deflection unit 10 according to claim 1, wherein the horizontal output and deflection unit 10 includes an amplifier transistor Q1, a damping diode D1, a capacitor C1, C2, C3, a variable coil VL1, a transformer T2, and a deflection. The deflection signal detector 20 includes a capacitor C3 and a transformer T1, and the rectifier 30 includes a diode D2, a smooth capacitor C4, and a load resistor (H-DY). R1), the attenuator 40 is composed of the spherical resistor attenuators R2, R3, R4 and the variable resistor VR1, and the comparator 50 is composed of the resistors R5-R10 and capacitors C5-C8. ), A diode D3, a zener diode ZD1, and an op amp, and the reference setting unit 60 includes a zener diode ZD1 and resistors R9 and R10. Comprising an emitter stabilizer (R12) and a bias resistor (R11), the current amplifier 80 includes a base resistor (R10) and amplification drive transistor (Q3) and current amplifier (Q4) and transistor protection diode (D4) And a current interrupting resistor (R14). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900001289A 1990-02-03 1990-02-03 Laster size control circuit KR920009344B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900001289A KR920009344B1 (en) 1990-02-03 1990-02-03 Laster size control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900001289A KR920009344B1 (en) 1990-02-03 1990-02-03 Laster size control circuit

Publications (2)

Publication Number Publication Date
KR910016188A true KR910016188A (en) 1991-09-30
KR920009344B1 KR920009344B1 (en) 1992-10-15

Family

ID=19295763

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900001289A KR920009344B1 (en) 1990-02-03 1990-02-03 Laster size control circuit

Country Status (1)

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KR (1) KR920009344B1 (en)

Also Published As

Publication number Publication date
KR920009344B1 (en) 1992-10-15

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