KR960028132A - Display Stabilization Circuit of Monitor - Google Patents

Display Stabilization Circuit of Monitor Download PDF

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Publication number
KR960028132A
KR960028132A KR1019940037149A KR19940037149A KR960028132A KR 960028132 A KR960028132 A KR 960028132A KR 1019940037149 A KR1019940037149 A KR 1019940037149A KR 19940037149 A KR19940037149 A KR 19940037149A KR 960028132 A KR960028132 A KR 960028132A
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KR
South Korea
Prior art keywords
deflection signal
resistor
monitor
deflection
stabilization circuit
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Ceased
Application number
KR1019940037149A
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Korean (ko)
Inventor
황기봉
Original Assignee
배순훈
대우전자 주식회사
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Priority to KR1019940037149A priority Critical patent/KR960028132A/en
Publication of KR960028132A publication Critical patent/KR960028132A/en
Ceased legal-status Critical Current

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Abstract

본 발명은 모니터에 관한 것으로서, 특히 음극선관에 인가되는 그레이드(Grid) 전류를 수직 편향 신호 및 수평 편향 신호의 크기에 의해 제어함으로써, 비디오 신호가 음극선관의 새도우 마스크에 정확하게 주사되는 디스플레이 안정화 회로에 관한 것이다. 이와같은 본 발명은 입력되는 편향 신호(Df)의 크기를 검파하는 편향 신호 검파부(10)와, 편향 신호 검파부(10)에 의해 검파된 편향치와 미리 설정된 기준치(Vref)와 비교하여 그 차가 출력되는 비교부(20)와, 상기 비교부(20)에서 출력되는 비교치로 따라 그레이드 단자(G1)를 통해 음극선관(CRT)에 인가되는 전류를 제어하는 제어부(30)로 구성된다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitor, and more particularly, to a display stabilization circuit in which a video signal is accurately scanned into a shadow mask of a cathode ray tube by controlling the grid current applied to the cathode ray tube by the magnitude of the vertical deflection signal and the horizontal deflection signal. It is about. The present invention compares the deflection signal detector 10 for detecting the magnitude of the input deflection signal Df, the deflection value detected by the deflection signal detector 10 with the preset reference value Vref. Comparing unit 20 that the difference is output, and a control unit 30 for controlling the current applied to the cathode ray tube (CRT) through the grade terminal (G1) according to the comparison value output from the comparing unit 20.

Description

모니터의 디스플레이 안정화 회로Display Stabilization Circuit of Monitor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 모니터의 디스플레이 안정화 회로의 구성을 보인 도면.2 is a view showing the configuration of a display stabilization circuit of a monitor according to the present invention.

Claims (4)

색신호가 그레이드 단자를 통해 입력되는 전압에 의해 음극선관의 새도우 마스크에 결상되는 모티터에 있어서, 입력되는 편향 신호를 검파하는 편향 신호 검파 수단과, 상기 편향 신호 검파 수단에 의해 검파된 편향 신호와 기준치와 비교하는 비교 수단과, 상기 비교 수단에서 출력되는 비교치에 의해 그레이드 단자에 인가되는 전류를 제어하는 제어 수단으로 구성됨을 특징으로 하는 모니터의 디스플레이 안정화 회로.A monitor in which a color signal is formed in a shadow mask of a cathode ray tube by a voltage input through a grade terminal, comprising: deflection signal detection means for detecting an input deflection signal; a deflection signal and a reference value detected by the deflection signal detection means; And control means for controlling the current applied to the grade terminal by the comparison value outputted from the comparison means. 제1항에 있어서, 상기 편향 신호 검파 수단은 상기 편향 신호(Df)를 반파 정류시킨 후 평활시키는 다이오드(D11) 및 콘덴서(C11)의 출력 신호를 분배시키는 저항(R11)(R12)으로 구성됨을 특징으로 하는 모니터의 디스플레이 안정화 회로.The deflection signal detecting means comprises a diode (D11) for half-wave rectifying and smoothing the deflection signal (Df) and a resistor (R11) (R12) for distributing an output signal of the capacitor (C11). Display stabilization circuit of the monitor. 제2항에 있어서, 상기 비교 수단은 입력되는 전원(Vcc)를 분배시켜 기준치를 설정하는 저항(R21)(R22)와, 상기 편향 신호 검파부(10)의 저항(R11)(R12)의 분배된 전압을 바이패스시키는 저항(R23)와, 상기 저항(R21)(R22)의 분배된 기준치와 저항(R23)를 통과한 편향치와 비교하는 비교기(COMP)로 구성됨을 특징으로 하는 모니터의 디스플레이 안정화 회로.3. The comparison means according to claim 2, wherein the comparison means distributes the resistors R21 and R22 for setting the reference value by distributing the input power Vcc and the resistors R11 and R12 of the deflection signal detector 10. And a comparator (COMP) for comparing the resistor (R23) for bypassing the applied voltage with the divided reference value of the resistors (R21) and (R22) and the deflection value passing through the resistor (R23). Stabilization circuit. 제3항에 있어서, 상기 제어 수단은 상기 비교 수단에서 출력되는 비교치를 반파 정류시키는 다이오드(D31)와, 상기 다이오드(D31)에 의해 정형된 전압을 분배시키는 저항(R31)(R32)와, 상기 저항(R31)(R32)의 분배된 전압에 의해 스위칭되는 트랜지스터(Q31)와, 상기 트랜지스터(Q31)의 스위칭 상태에 의해 스위칭되는 트랜지스터(Q32)와, 상기 트랜지스터(Q31)의 전류가 제어되어 그레이드 단자(G1)를 통해 입력되는 전류를 제어하는 저항(R33)으로 구성됨을 특징으로 하는 모니터의 디스플레이 안정화 회로.4. The control circuit according to claim 3, wherein the control means comprises: a diode (D31) for half-wave rectifying the comparison value output from the comparing means, a resistor (R31) (R32) for distributing the voltage shaped by the diode (D31), and The transistor Q31 switched by the divided voltage of the resistors R31 and R32, the transistor Q32 switched by the switching state of the transistor Q31, and the current of the transistor Q31 are controlled and graded. Display stabilization circuit of the monitor, characterized in that consisting of a resistor (R33) for controlling the current input through the terminal (G1). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940037149A 1994-12-27 1994-12-27 Display Stabilization Circuit of Monitor Ceased KR960028132A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940037149A KR960028132A (en) 1994-12-27 1994-12-27 Display Stabilization Circuit of Monitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940037149A KR960028132A (en) 1994-12-27 1994-12-27 Display Stabilization Circuit of Monitor

Publications (1)

Publication Number Publication Date
KR960028132A true KR960028132A (en) 1996-07-22

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ID=66769139

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940037149A Ceased KR960028132A (en) 1994-12-27 1994-12-27 Display Stabilization Circuit of Monitor

Country Status (1)

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KR (1) KR960028132A (en)

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Patent event code: PA01091R01D

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Patent event date: 19941227

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