KR910011042A - Frequency synchronization method of power circuit - Google Patents

Frequency synchronization method of power circuit Download PDF

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Publication number
KR910011042A
KR910011042A KR1019890017892A KR890017892A KR910011042A KR 910011042 A KR910011042 A KR 910011042A KR 1019890017892 A KR1019890017892 A KR 1019890017892A KR 890017892 A KR890017892 A KR 890017892A KR 910011042 A KR910011042 A KR 910011042A
Authority
KR
South Korea
Prior art keywords
circuit
image
power circuit
synchronization method
frequency synchronization
Prior art date
Application number
KR1019890017892A
Other languages
Korean (ko)
Other versions
KR920003090B1 (en
Inventor
이강훈
Original Assignee
정몽헌
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by 정몽헌, 현대전자산업 주식회사 filed Critical 정몽헌
Priority to KR1019890017892A priority Critical patent/KR920003090B1/en
Publication of KR910011042A publication Critical patent/KR910011042A/en
Application granted granted Critical
Publication of KR920003090B1 publication Critical patent/KR920003090B1/en

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/63—Generation or supply of power specially adapted for television receivers

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Details Of Television Scanning (AREA)

Abstract

내용 없음.No content.

Description

전원회로의 분주식 동기방법Frequency synchronization method of power circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명을 적용한 장치의 개략적인 구성을 나타내는 블록도.2 is a block diagram showing a schematic configuration of an apparatus to which the present invention is applied.

제3도는 본 발명의 일실시예 타이밍도.3 is a timing diagram of an embodiment of the present invention.

Claims (1)

수평편회로(2c)를 포함하는 영상회로(2b)와, 외부로부터 받은 전원을 상기 영상회로(2d)에 제공하는 스위칭 전원수단(2a)과, 상기 영상회로(2b)에 연결되어 영상출력기능을 수행하는 영상출력수단으로 구성된 영상 출력장치에 있어서, 상기 영상회로(2b)의 수평편향회로(2c)로부터의 수평편향 주파수(f)를 1 : n으로 분주한 후 상기 분주된 주파수(f/n)를 상기 스위칭전원 수단(2a)의 동기신호로 사용하는 것을 특징으로 하는 전원 회로의 분주식 동기방법(여기서 n은 자연수 임).An image output function connected to the image circuit 2b including a horizontal piece circuit 2c, switching power supply means 2a for supplying power received from the outside to the image circuit 2d, and the image circuit 2b. An image output apparatus comprising: an image output means for performing a step of: dividing a horizontal deflection frequency (f) from a horizontal deflection circuit (2c) of the image circuit (2b) by 1: n and then dividing the frequency (f / n) is used as a synchronization signal of the switching power supply means (2a), wherein n is a natural number. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019890017892A 1989-11-30 1989-11-30 Demultiply type synchronization method of power circuit KR920003090B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019890017892A KR920003090B1 (en) 1989-11-30 1989-11-30 Demultiply type synchronization method of power circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019890017892A KR920003090B1 (en) 1989-11-30 1989-11-30 Demultiply type synchronization method of power circuit

Publications (2)

Publication Number Publication Date
KR910011042A true KR910011042A (en) 1991-06-29
KR920003090B1 KR920003090B1 (en) 1992-04-13

Family

ID=19292559

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890017892A KR920003090B1 (en) 1989-11-30 1989-11-30 Demultiply type synchronization method of power circuit

Country Status (1)

Country Link
KR (1) KR920003090B1 (en)

Also Published As

Publication number Publication date
KR920003090B1 (en) 1992-04-13

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