KR910010225B1 - Image information processing method - Google Patents

Abstract

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Description

Image Information Processing Method

1 is a block diagram of an image information processing apparatus for implementing the image information processing method according to the first embodiment of the present invention.

2 is a diagram for explaining image information on a document to be processed by the logic operation circuit 17. As shown in FIG.

* Explanation of symbols for the main parts of the drawings

1,3: 1st and 2nd line buffer 5,7,9,11,13,15: D type flip flop

17: logic operation circuits A1 to A3, B2, B3, C1 to C3, C1a, C2a: image information

[Industrial use]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image information processing method, and more particularly, to an image information processing method for logically processing and sending a plurality of lines of image information obtained by performing an original scan suitable for a facsimile or the like into image information for one line. will be.

[Traditional Technology and Problems]

In the conventional image information processing apparatus, two pixel image information obtained by reading and scanning an original is re-created as one pixel image information in order to efficiently transfer more original images while maintaining a constant transmission speed. In this case, if one pixel is removed and transmitted at a time, the isolated point of the original image is lost, and the information on the image may not be correctly transmitted when the receiver plays back the image. It is born.

Therefore, in order to be able to reproduce the fine picture of the original image without missing it, any one of the two pixels corresponding to the next one pixel to be converted is black if any of the pixels is black. Getting In this way, when two pixels of image information are rewritten into one pixel of image information and sent to the receiving side, the image information processing is doubled while maintaining a constant transmission speed. It becomes high, and when it is reproduced on the receiving side, it is possible to reproduce an image in which the isolation point is not lost.

However, in the conventional image information processing method as described above, not all original images can be faithfully reproduced on the receiving side without losing the information amount, and on the side which extracts image information corresponding to each scanning pixel, recording corresponding to the original image is performed. The image may not be obtained.

As described above, in the conventional image information processing method, since correction pixels are obtained according to the logicalization of two adjacent pixels corresponding to correction exchange, image information can be taken out without losing the isolation point of black pixels. There is a problem that the isolated point of the white pixel enclosed in cannot be reproduced.

In addition, even if the range of pixels to be referred to when processing image information is enlarged in one dimension, the change in image information in the vertical direction is not reflected in the enlarged direction, so that the image pattern to be sent cannot be matched. There is also a problem that will happen.

[Purpose of invention]

Therefore, the present invention was invented to solve the problems of the conventional image information processing method as described above, while maintaining a constant transmission speed, it is possible to increase the processing efficiency of the image information, and also without losing the amount of information. It is an object of the present invention to provide an image information processing method capable of obtaining a recorded image corresponding to the above.

[Configuration of Invention]

The image information processing method of the present invention for achieving the above object comprises a first step of supplying adjacent three-bit image information (C1, C2, C3) on the current scan line, and the image information ( Supplying image information (B2, B3) adjacent to C2, C3, image information A1, A2, A3 corrected and converted into image information corresponding to the image information (C1, C2, C3) on the pre-scanning line; Step 3) of supplying the image information, the fourth step of supplying the image information C1a of which the image information C1 has been corrected and converted, and the image on the current scanning line from the image information supplied in the first to fourth steps. And a fifth step of performing correction conversion with the information C2.

[Action]

In the present invention, correction conversion is performed to the image information C2a on the current scanning line according to the image information A1 to A3, B2, B3, C1 to C3, C1a, so that the fine image information is not lost and the processing direction is lost. This makes it possible to obtain a recording image corresponding to the playout image without deforming the reproduced image.

EXAMPLE

Hereinafter, a first embodiment of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram of an image information processing apparatus for implementing the image information processing method according to the first embodiment of the present invention. The image information processing apparatus includes a first line buffer BUFA: 1 and a second line buffer. (BUFB: 3), D flip-flops (5, 7, 9, 11, 13, 15) and logic operation circuits 17, of which the first line buffer 1 is excellent after correction conversion. The image information of the first line is stored. That is, the image information of the even-numbered line after the correction conversion output from the logic operation circuit 17 is input terminal I of the first line buffer 1 in synchronization with the shift clock signal PCK inputted to the clock terminal CK. ), And the switching signal CPE is input to the enable terminal EN. The switching signal CPE is a signal representing the odd and even lines. Accordingly, the signal output from the output terminal O of the first line buffer 1 is input to the D terminal of the D flip-flop 5 and is input to the terminal A3 of the logic operation circuit 17.

Subsequently, the second line buffer 3 stores the image information of the radix line, that is, the signal is sent only to the enable terminal EN when the radix line is being scanned. Image information can be input only when the odd-numbered line is being scanned. Therefore, the scanned image information Pi is input to the input terminal I of the second line buffer 3 in synchronization with the shift clock signal PCK inputted to the clock terminal CK, and from there the second line buffer 3. The signal output from the output terminal (O) of) is input to the D terminal of the D flip-flop (7) and is input to the terminal (B3) of the logic operation circuit (17).

On the other hand, the D-type flip-flop 5 stores 1-bit image information output from the first line buffer 1, and the D-type flip-flop 11 stores the image information output from the D-type flip-flop 5 The D-type flip-flops 5 and 11 are synchronized together with the shift clock signal PCK, so that the image information A1 output from the D-type flip-flop 11 is the D-type flip-flop 5. The image information 1 bit ahead of the image information A2 outputted from the image is obtained. Similarly, the image information A2 output from the D-type flip-flop 5 becomes image information one foot ahead of the image information A3 output from the first line buffer 1.

Subsequently, the D flip-flop 7 stores one bit of image information output from the second line buffer 3. Therefore, the image information B2 output from the D flip-flop 7 becomes image information one bit ahead of the image information B3 output from the second line buffer 3. The D flip-flop 9 stores one bit of image information Pi, and the D flip-flop 15 stores one bit of image information output from the D flip-flop 9. The operation of the D-type flip-flops 9 and 15 operates in the same manner as the operation of the D-type flip-flops 5 and 11. Therefore, the image information C1 output from the D-type flip-flop 15 becomes image information one bit ahead of the image information C2 output from the D-type flip-flop 9, and from the D-type flip-flop 9 The output image information C2 becomes image information one bit ahead of the image information C3 currently being input.

Subsequently, the D flip-flop 13 stores one bit of the output signal of the logic operation circuit 17 and sends it to the logic operation circuit 17. The logic operation circuit 17 inputs the image information A1 to A3. From B2M B3, C1 to C3, C1a, the logical operation shown in the following equation is performed to determine the image information C2a to be output. In other words,

It becomes

The logic operation circuit 17 then outputs the image information C2a as an output image telegram Po.

Next, the operation of the present embodiment will be described. When the odd-numbered line is being scanned, a signal is sent to the enable terminal EN of the second line buffer 3 so that the second line buffer 3 becomes an inputable state, so it is input to the second line buffer 3. The image information Pi to be stored is stored. If the even-numbered line is scanned, the signal sent to the enable terminal EN of the second line buffer 3 is turned off, so that the second line buffer 3 cannot be input. It is in a state.

At this time, the input image information Pi is sent to the D terminal of the D flip-flop 9 and the terminal C3 of the logic operation circuit 17, respectively, from which the first and second lines are supplied. The image information A1-A3, B2, B3, C1-C3, C1a is sent out from the buffers 1, 3 and the D flip-flops 5, 7, 9, 11, 13, and 15, respectively. The logical operation is performed according to the equation. The image information C2a of the logic operation circuit 17 obtained as a result of the operation is sent to the other side as the output information Po, and the D terminal of the D-type flip-flop 13 and the input of the first line buffer 1 are input. Each is sent to terminal I. Then, since the first line buffer 1 is the image information on the even-numbered line as described above, the image information corrected and converted by the logic operation circuit 17 is stored.

In this manner, when the conversion processing image information of the image information of the even-numbered line ends, the odd-numbered line is scanned again. The image information on the odd-numbered line is stored in the second line buffer 3. When the next even-numbered line is scanned, the logical operation of the above formula (1) is performed by the logic circuit 17 having image information output from the first and second line buffers 1 and 3.

FIG. 2 shows image information processed by the logic operation circuit 17. That is, the image information C1 to C3 represent three bits of image information adjacent to the current scan line, and the image information C1a is D. FIG. The image information sent from the type flip-flop 13 to the logic operation circuit 17 is shown, and the image information C2a indicates the image information output from the logic operation circuit 17. The image information B2 and B3 are output from the second line buffer 3 and the D-type flip-flop 7 as the information of the preceding scan line (the odd-numbered scan line), respectively, and are input to the logic operation circuit 17. Will be. The image information A1-A3 is image information corrected and converted by the logical operation circuit 17 as image information corresponding to the image information C1-C3 on the previous scanning line. ) Is output from the D-type flip-flops 11 and 5 and the first line buffer 1 and input to the logic operation circuit 17.

The image information C1, C2 is output from the output terminal Q of the D flip-flops 15, 9, and input to the terminals C1, C2 of the logic operation circuit 17, respectively, and the image information C3. Is input to the terminal C3 of the logic operation circuit 17 as the input image information Pi.

As described above, in the present embodiment, since two pixels of image information obtained by reading and retrieving are processed by a logic operation circuit to be sent to the receiving side, more original image information can be sent to the receiving side in a short time while the transmission speed is kept constant. Will be. In addition, since the reference pixel is set two-dimensionally when performing arithmetic processing, not only the isolation point can be prevented but also the deformation of the pixel pattern can be prevented. In other words, as a result of the read scanning at the pixel density twice the pixel density sent to the receiving side, a recording image having excellent resolution corresponding to the original image is obtained.

[Effects of the Invention]

As described above, according to the present invention, not only can the processing speed of the image information be improved while the transmission speed is kept constant, but also the recorded image corresponding to the original image can be obtained without losing the amount of information.

Claims (1)

A first step of supplying adjacent three-bit image information C1, C2, C3 on the current scanning line, and supplying image information B2, B3 adjacent to the image information C2, C3 on all scanning lines Step 3, a step 3 of supplying the image information A1, A2, A3 corrected and converted into image information corresponding to the image information C1, C2, C3 on the previous scan line, the image information C1 is corrected and converted. And a fifth step of supplying the made image information C1a and a fifth step of performing correction conversion from the image information supplied in the first to fourth steps to image information C2a on the current scanning line. An image information processing method characterized by the above-mentioned.

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