KR900019140U - 디스플레이용 메모리 제어회로 - Google Patents

디스플레이용 메모리 제어회로

Info

Publication number
KR900019140U
KR900019140U KR2019890005396U KR890005396U KR900019140U KR 900019140 U KR900019140 U KR 900019140U KR 2019890005396 U KR2019890005396 U KR 2019890005396U KR 890005396 U KR890005396 U KR 890005396U KR 900019140 U KR900019140 U KR 900019140U
Authority
KR
South Korea
Prior art keywords
display
control circuit
memory control
memory
circuit
Prior art date
Application number
KR2019890005396U
Other languages
English (en)
Other versions
KR940008120Y1 (ko
Inventor
김웅철
Original Assignee
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 금성사 filed Critical 주식회사 금성사
Priority to KR2019890005396U priority Critical patent/KR940008120Y1/ko
Publication of KR900019140U publication Critical patent/KR900019140U/ko
Application granted granted Critical
Publication of KR940008120Y1 publication Critical patent/KR940008120Y1/ko

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Controls And Circuits For Display Device (AREA)
KR2019890005396U 1989-04-28 1989-04-28 디스플레이용 메모리 제어회로 KR940008120Y1 (ko)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890005396U KR940008120Y1 (ko) 1989-04-28 1989-04-28 디스플레이용 메모리 제어회로

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890005396U KR940008120Y1 (ko) 1989-04-28 1989-04-28 디스플레이용 메모리 제어회로

Publications (2)

Publication Number Publication Date
KR900019140U true KR900019140U (ko) 1990-11-08
KR940008120Y1 KR940008120Y1 (ko) 1994-11-23

Family

ID=19285589

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890005396U KR940008120Y1 (ko) 1989-04-28 1989-04-28 디스플레이용 메모리 제어회로

Country Status (1)

Country Link
KR (1) KR940008120Y1 (ko)

Also Published As

Publication number Publication date
KR940008120Y1 (ko) 1994-11-23

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