KR900009074Y1 - Multi-function switch circuit - Google Patents

Abstract

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Description

Multi-function Switch Circuit Using Switch Press Time Detection

1 is a flowchart illustrating a function selection mode and a number change mode with two switches of a digital clock in a conventional manner.

2 is a multifunctional switch circuit diagram according to the present invention.

3 is a timing diagram in the main part of FIG.

4 is a flowchart illustrating a function selection mode and a number change mode with two switches of a digital clock according to the present invention.

* Explanation of symbols for main parts of the drawings

1: switch input stage 2, 5, 7: flip-flop

3, 4, 6: logic gate

The present invention relates to a multifunction switch circuit using switch press time detection, and more particularly, to a multifunction switch using one switch.

The present invention can be applied to a digital wrist watch, and also to the scanning of a television channel of a remote control device of an audio / video system and a fast-forwarding function of a video tape.

1 is a flowchart for explaining a function selection mode and a number change mode with two switches in a digital clock.

The conventional digital clock is divided into a function selection mode for switching the modes of month, day, hour, minute, and second, and a numerical change mode for setting the desired time and date by increasing the day, month, hour, minute, and second, respectively. .

In FIG. 1, SW ₁ is a function selection switch and SW ₂ is a number change switch.

First, pressing the function selection switch SW ₁ switches the month function selection mode to change the number of months in the normal display state of hours and minutes, and then pressing the number change switch SW ₂ increases the number of months.

Press SW ₁ again to switch to the function selection mode of the day, then press SW ₂ to increase the number of days.

With this switch operation, the month, day, hour, minute and second display can be adjusted as desired. And when the setting operation of month, day, hour, minute and second is completed, press SW ₁ to return to the normal display state and complete the switch operation.

As described above, since a digital clock has to be operated with two switches, the chip size of a semiconductor is increased, the life of a metal wire for connecting a switch is shortened, and the switch is small, which makes it difficult to repeat the pressing operation. There was this.

Accordingly, an object of the present invention is to provide a multifunctional switch circuit for performing the function selection mode and the number change mode according to the switch pressing time using one switch.

Hereinafter, one embodiment according to the present invention will be described in detail with reference to FIGS. 2 to 4.

2 is a multi-function switch circuit according to the present invention, where 1 is a switch input terminal, and in this switch input terminal 1, a switching signal is output as the switch is pressed.

The flip-flop 2, which inputs the switching signal and is synchronized with a clock S _f1 of 0.5 Hz, detects whether the push time of the switch exceeds 1 second.

A flip-flop which is synchronized with the output signal of the NAND gate 4 inputting the switching signal and applying the output signal of the flip-flop 2 and the clock S _f2 of 16 Hz. (5) outputs a function selection signal.

The flip-flop 7 synchronized with the output signal of the flip-flop 2 and the output signal of the NAND gate 6 for inputting the clock S _f3 of 4 Hz is operated as a two-division period.

All flip-flops (2, 5, 7) have control terminals The switch input signal is human.

The operation of the multifunction switch circuit having such a configuration will be described in parallel with the third and fourth drawings.

Pressing the switch in the normal display state switches to the month selection function mode, and then pressing it again displays the increase rate of the numeric display of the month display according to the time the switch is pressed.

Therefore, when the switch is pressed again, the function selection mode of the work display is switched, and when the switch is pressed, the increase speed of the work display is displayed differently according to the switching time.

In this way, the function selection mode and the number change mode are continuously changed according to the input of the switch. When the number change of the second display is finally completed and the switch is pressed, the function returns to the initial normal state and displays the adjusted time and date.

This sequence is illustrated in FIG.

Here, if the switching time of the detected switch is 1 second or less, the numerical display is incremented by one.

If the switching time is more than 1 second-2 seconds, the speed of increase of the number increases so that the last December appears when the number of months is changed, and 31 days last when the number of days is changed, and the number of hours, minutes, and seconds changes. Finally, 11 hours, 59 minutes, and 59 seconds, respectively, increase by 1 according to the unit time, and then the unit time is recycled.

In FIG. 3, (A) is a waveform of the switching signal output from the switch input stage 1, and this signal becomes a low level when the switch is pressed. (B) is a waveform of a signal to which the flip-flop 2 for detecting the switch pressing time is applied to the synchronization terminal, and is a 0.5 Hz clock S _f1 having a period of 2 seconds.

(C) shows a waveform of 16 Hz clock (S _f2 ) as a signal trapped at one input of the NAND gate 4 for synchronizing the flip-flop 5 which outputs the function selection signal, and (D) shows the number change signal. Is a waveform applied to one input terminal of the NAND gate 6 for synchronizing the flip-flop 7, which outputs a 4Hz clock (S _f3 ) with a period of 1.25 seconds, and (E) and (F) are flip-flops (5), respectively. , 6) is a waveform of the function selection signal and the number change signal.

In FIG. 2, first, when the switch is pressed for less than 1 second, a high level signal is output for a short time from the flip-flop 5 synchronized by the signal S _f2 applied to the NAND gate 4, and the switch is pressed. Terminal of flip-flop (2, 5, 7) A low level signal is applied to all flip-flops to output a low level signal.

However, if the switch press is pressed for more than 1 second, 0.5 Hz clock (S _f1 ) is applied to the sync terminal of the flip-flop 2, so that after the clock synchronization coincides (1 second-2 seconds), the switch press is stopped. Flip-flop 2 outputs a high level signal.

At this time, the high level signal is fixedly applied to the synchronous terminal of the flip flop 5 by the high level signal, and the flip flop 7 is enabled by the high level signal of the flip flop 2.

That is, since the signal applied to the synchronization terminal of the flip-flop 7, which is a 2-minute period, is a 4 Hz clock having a cycle of 0.25 seconds, the flip-flop 7 outputs a 2 Hz clock having a cycle of 0.5 seconds. To occur.

When the switch is stopped, all the flip-flops output a low level signal and are fixed.

By adjusting the frequency of the signal applied to the synchronization terminals of all the flip-flops in the circuit, it is possible to adjust each output frequency.

As described above, according to the present invention, since the switch circuit is configured using one switch, the usefulness of the chip area is increased, the bonding work process and the manufacturing cost are reduced, and the switch operation is simplified.

Claims (1)

A flip-flop 2 which inputs a switching signal output from the switch input stage 1 by one switch and is synchronized with a clock of 0.5 Hz, an inverting gate 3 that inverts the output of the flip-flop 2, A NAND gate 4 that applies an output of the inverted gate 3 and a clock of 16 Hz, a flip-flop 5 that inputs the switching signal and is synchronized with an output of the NAND gate 4, and the flip-flop 2 And a flip-flop (7) for dividing the output of the NAND gate (6) by dividing the output of the NAND gate (6) and the 4 Hz clock. And a multi-function switch circuit using a switch press time detection, characterized in that for outputting a number change signal.