KR900005348B1 - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device Download PDF

Info

Publication number
KR900005348B1
KR900005348B1 KR1019850004374A KR850004374A KR900005348B1 KR 900005348 B1 KR900005348 B1 KR 900005348B1 KR 1019850004374 A KR1019850004374 A KR 1019850004374A KR 850004374 A KR850004374 A KR 850004374A KR 900005348 B1 KR900005348 B1 KR 900005348B1
Authority
KR
South Korea
Prior art keywords
wire
semiconductor device
bonding
electrode pad
station
Prior art date
Application number
KR1019850004374A
Other languages
Korean (ko)
Other versions
KR860001477A (en
Inventor
오사무 우스다
Original Assignee
가부시끼가이샤 도오시바
사바 쇼오이찌
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 도오시바, 사바 쇼오이찌 filed Critical 가부시끼가이샤 도오시바
Publication of KR860001477A publication Critical patent/KR860001477A/en
Application granted granted Critical
Publication of KR900005348B1 publication Critical patent/KR900005348B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/06—Wiring by machine
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/002—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating specially adapted for particular articles or work
    • B23K20/004—Wire welding
    • B23K20/005—Capillary welding
    • B23K20/007—Ball bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • H01L21/603—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R43/00—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors
    • H01R43/02—Apparatus or processes specially adapted for manufacturing, assembling, maintaining, or repairing of line connectors or current collectors or for joining electric conductors for soldered or welded connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H01L2224/8503—Reshaping, e.g. forming the ball or the wedge of the wire connector
    • H01L2224/85035—Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball"
    • H01L2224/85043—Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball" using a flame torch, e.g. hydrogen torch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H01L2224/85048—Thermal treatments, e.g. annealing, controlled pre-heating or pre-cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85053—Bonding environment
    • H01L2224/85054—Composition of the atmosphere
    • H01L2224/85075—Composition of the atmosphere being inert
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20106—Temperature range 200 C=<T<250 C, 473.15 K =<T < 523.15K

Abstract

Semiconductor device is mfd. in an arrangement where a lead frame is conductrd along a convey path formed by a cover, the path contg. a die bonding station, wier bonding station, post-bonding station, and post-baking station. Windows are formed in the cover and heater blocks are provided in the convey path, while gas introduction parts are located on the cover. The lead frame on a guide rail to the first station, where a collet passes through the window, carrying a semicondcutor pellet which is mounted through a solder layer. At the wire bonding station, an electrode pad is applied to the pellet. A capillary clamping a bonding wire moved through the window, while redn. gases are supplied and the lower part of the wire is heated to form a ball.

Description

반도체장치의 제조방법Manufacturing Method of Semiconductor Device

제1도는 본 발명 전극패드에 동계통와이어를 접합시켜주기 직전의 단면도.1 is a cross-sectional view immediately before bonding the copper wire to the electrode pad of the present invention.

제2도는 동계통와이어가 전극패드에 부착되고 나서 절단된 상태의 단면도.2 is a cross-sectional view of the state in which the copper wire is cut after being attached to the electrode pad.

제3도는 동계통와이어가 굴곡시켜진 상태의 단면도.3 is a cross-sectional view of a state where the copper wire is bent.

제4도는 동계통와이어가 리이드부에 연결시켜진 상태의 단면도.4 is a cross-sectional view of a state where the copper wire is connected to the lead portion.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1A : 도상부 1B : 리이드부1A: Phase portion 1B: Lead portion

2 : 반도체칩 2A : 전극패드2: semiconductor chip 2A: electrode pad

2B : 접촉막 3 : 히이터2B: contact film 3: heater

4 : 캐필러리 5 : 동계통와이어4: capillary 5: winter wire

5A : 본딩와이어 6 : 가동커버5A Bonding Wire 6: Movable Cover

6a : 구멍 7 : 토오치6a: hole 7: torch

8 : 환원성 개스 9 : 본딩기구8: reducing gas 9: bonding mechanism

[기술분야][Technical Field]

본 발명은 반도체 장치의 제조방법에 관한 것으로, 특히 본딩와이어로서 동계통와이어를 사용해서 제조하는 반도체장치의 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device using a copper wire as a bonding wire.

[종래의 기술 및 문제점]Conventional Technology and Issues

종래의 기밀봉함형이나 수지봉함형으로 된 반도체장치에서는 반도체소자의 전극패드와 외부리이드를 접속시키는 본딩와이어로서 흔히 금선(金線)을 쓰고 있으나, 이러한 금선을 사용한 반도체장치에는 다음과 같은 문제가 있었다.In the conventional hermetic sealing type or resin sealing type semiconductor device, a gold wire is often used as a bonding wire for connecting electrode pads and external leads of a semiconductor element. However, the following problems arise in a semiconductor device using such a gold wire. there was.

즉 기히 알려져 있는 바와 같이 금선을 본딩와이어로 해서 고온상태에서 조립하는 경우, 알루미늄제의 전극패드와 본딩와이어의 접합부위에 금과 알루미늄의 금속간 화합물이 생성되게 되고, 이러한 금속간 화합물의 생성에 따라 접합부의 전기적 특성이 나빠지게 되는 열화(劣化)현상이 일어나게 된다. 따라서, 금선을 본딩와이어로 사용하는 반도체장치에 있어서는, 본딩와이어자체가 산화되는 일은 없다 하더라도 접합부에서의 열화현상이 진행됨에 따라 치명적인 접속불량이 발생하기 쉽다고 하는 결점이 있었다.That is, as is well known, when the gold wire is assembled in a high temperature state using a bonding wire, an intermetallic compound of gold and aluminum is formed at the junction between the aluminum electrode pad and the bonding wire. Deterioration occurs due to deterioration of the electrical properties of the junction. Therefore, in the semiconductor device using the gold wire as a bonding wire, even if the bonding wire itself is not oxidized, there is a drawback that a fatal connection failure is likely to occur as the deterioration at the junction proceeds.

그리고 이러한 금과 알루미늄과의 화합물반응은 온도가 높을 때에 진행되기 때문에, 종래와 같이 금선을 사용한 반도체장치를 고온상태에서 사용하게 되는 경우에 특히 문제로 되고 있고, 이를 고온에서 방치 시험을 한 결과로 극히 만족스럽지 못했다.In addition, since the compound reaction between gold and aluminum proceeds at a high temperature, it is particularly problematic when a semiconductor device using a gold wire is used at a high temperature as in the prior art, and this is a result of the standing test at a high temperature. I was not very satisfied.

한편, 금선을 본딩와이어로 사용하는 경우에는 고가의 금을 사용해야 하기 때문에 반도체장치의 제조비용이 비싸게 된다고 하는 것도 문제점으로 되고 있다.On the other hand, when the gold wire is used as the bonding wire, expensive gold must be used, so that the manufacturing cost of the semiconductor device becomes expensive.

[발명의 목적][Purpose of invention]

이에 본 발명은 상기와 같은 문제점을 해결하기 위해 발명된 것으로, 전극패드의 와이어접합부에 결함이 발생하지 않을 뿐만 아니라 고온에서의 내구성이 종래의 반도체보다 현저히 높으면서 저렴한 값으로 제조할 수 있는 반도체장치의 제조방법을 제공함에 그 목적이 있다.Accordingly, the present invention has been invented to solve the above problems, and the semiconductor device can be manufactured at a low price while not only causing a defect in the wire bonding portion of the electrode pad but also having a high durability at a high temperature than that of a conventional semiconductor. The purpose is to provide a manufacturing method.

[발명의 개요]Overview of the Invention

상기와 같은 목적을 달성하기 위한 본 발명은, 동선이나 동합금선과 같은 것으로 된 동계통와이어를 본딩와이어로 사용해서 반도체장치를 제조하게 되는데, 본 발명에 따라 만들어진 반도체장치는, 동계통와이어가 본디와이어로 사용되었기 때문에 전극패트인 알루미늄과의 사이에 바람직스럽지 못한 금속간 화합물이 생성될 염려가 없을 뿐만 아니라, 높은 도전율을 갖게되고, 또 알루미늄와이어보다도 내식성 및 기계적 강도에 있어 우수하게 된다. 그리고 본 발명에 따른 반도체장치의 제조방법은 와이어본딩공정에서 동계통와이어의 선단부에 용접용 보올을 형성시킨 다음 그 보올을 일정 온도 이상의 환원성 개스중에서 환원시켜 접합시키게 되도록 되어 있기 때문에, 종래에는 동계통 와이어가 본딩와이어로 사용되지 못하였던 것을 실현시킬 수가 있게 된다.In order to achieve the above object, the present invention manufactures a semiconductor device using a copper wire made of a copper wire or a copper alloy wire as a bonding wire, and the semiconductor device made in accordance with the present invention is a copper wire made of a bond wire. Since it is used as an electrode pad, there is no fear that an undesirable intermetallic compound is produced between the electrode pad and aluminum, and it has high electrical conductivity and is superior in corrosion resistance and mechanical strength to aluminum wire. In the method of manufacturing a semiconductor device according to the present invention, since a welding bowl is formed at the tip of a copper wire in a wire bonding process, the ball is reduced and bonded in a reducing gas of a predetermined temperature or more. It is possible to realize that the wire was not used as a bonding wire.

[실시예]EXAMPLE

이하 본 발명을 첨부된 예시도면을 참조로 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

제1도 내지 제4도에 있어서, 참조부호 1A는 리이드프레임(lead frame)의 도상부(島狀部)이고, 부호 1B는 리이드부, 부호2는 도상부(1A)상에 접촉막(2B)을 매개로 접착시켜진 반도체칩, 부호 2A는 반도체칩(2)상에 형성시켜진 알루미늄제 전극패드, 부호 3은 리이드프레임이 놓여지는 히이터, 부호 4는 동계통 와이어(5)를 유도해서 압접시키는 캐필러리, 부호 6은 히이터(3)의 위쪽공간을 덮어주도록 설치된 가동커버,7은 동계통 와이어(5)를 절단해서 보올(5a)을 형성시키기 위한 산소,수소토오치이다.1 to 4, reference numeral 1A denotes an image portion of a lead frame, reference numeral 1B denotes a lead portion, and reference numeral 2 denotes a contact film 2B on the image portion 1A. 2) is an aluminum electrode pad formed on the semiconductor chip 2, 3 is a heater on which a lead frame is placed, and 4 is a copper wire 5 which leads to The capillary to be press-contacted, 6 is a movable cover provided to cover the upper space of the heater 3, 7 is oxygen and hydrogen torch for cutting the copper wire 5 to form the bowl 5a.

상기 히이터(3)는 와이어접합기의 XY스테이지 위에 탑재되어 이 XY스테이지와 함께 수평면재를 이동할 수 있도록 되어 있는바, 상기 가동커버(6)에는 캐필러리(4)보다 직경이 큰 구멍(6a)이 뚫려져 이 구멍(6a)내로 캐필러리(4)가 끼어들어가도록 되어 있으며, 상기 가동커버(6)와 히이터(3) 사이의 공간에는 도시되지 않은 환원성 개스공급장치로부터 환원성 개스(8)가 공급되어, 이 환원성 개스(8)가 가동커버(6)의 구멍(6a)을 통해 도면에 도시된 화살표 방향으로 캐필러리(4)의 바깥둘레을 따라 외부로 배출시켜지도록 되어 있다.The heater 3 is mounted on the XY stage of the wire jointer to move the horizontal surface material with the XY stage, and the movable cover 6 has a hole 6a having a larger diameter than the capillary 4. The capillary 4 is penetrated into this hole 6a, and the reducing gas 8 is supplied from a reducing gas supply device not shown in the space between the movable cover 6 and the heater 3. Is supplied so that the reducing gas 8 is discharged to the outside through the hole 6a of the movable cover 6 along the outer circumference of the capillary 4 in the direction of the arrow shown in the drawing.

다음에는 상기와 같이 구성된 와이어접착기에 의해 와이어가 본딩되어질 때의 각 부분의 작동에 대해 설명한다.Next, the operation of each part when the wire is bonded by the wire bonder configured as described above will be described.

먼저 산소, 수소토오치(7)로부터 불어나오는 개스화염에 의해 캐필러리(4)의 출구에서 절단되어진 동계통와이어(5)는 제1도에 도시된 바와 같이 캐필러리(4)의 출구에서 보올(5a)을 형성하게 된다. 이 상태에서 캐필러리(4)가 반도체칩(2)의 전극패드(2A)를 향해 내려오게 되면 동계통와이어(5)도 내려오게 되어 상기 보올(5a)이 전극패드(2A)에 압착시켜져 눌러붙게 되고, 그 결과 전극패드(2A)에 동계통와이어(5)가 접합시켜지게 된다. 이 경우 보올(5a)의 0.5 ~ 3㎛ 두께만큼 전극패드(2A)내에 부착시켜진 상태로 눌러붙어 편평한 단부로 되어 전극패드(2A)와 일체가 되도록 하는 것이 좋다.First, the copper wire 5 cut at the outlet of the capillary 4 by the gas flame blowing out from the oxygen and hydrogen torch 7 is the outlet of the capillary 4 as shown in FIG. To form the bowl (5a). When the capillary 4 is lowered toward the electrode pad 2A of the semiconductor chip 2 in this state, the copper wire 5 is also lowered and the bowl 5a is pressed against the electrode pad 2A. The copper wire 5 is bonded to the electrode pad 2A as a result. In this case, it is preferable to press the state while being attached to the electrode pad 2A by the thickness of 0.5-3 micrometers of the bowl 5a, and to make a flat end so that it may be integrated with the electrode pad 2A.

예컨대, 전극패드(2A)가 1~ 3㎛ 두께를 갖는 알루미늄층으로 형성되고 와이어(5)가 25㎛Ø 인 동선으로 되어 있는 경우 50~ 100g의 하중을 와이어(5)에 걸리게 하면, 이 와이어(5)가 전극패드(2A)로 부착되는 깊이는 0.5 ~ 2.5 ㎛ 범위가 된다. 또, 보올(5a)형성시에 있어서 보올(5a)은 용융온도 이상(예컨대 1000℃ 이상)으로 온도가 올라가고, 또 반도체칩(2)은 히이터(3)에 의해 바람직한 온도(예컨대 300℃)로 가열되어 있는 한편, 가동커버(6)의 하측공간에는 환원성 개스(8) (본 실시예에서는 N2(95~80%)와 H2(5~20%)로 조성된 개스)가 공급되어짐에 따라 환원성 개스(8)중에 놓여지게 되는 200 ℃ 이상의 온도를 갖는 보올(5a)표면은 환원된 상태로 된다.For example, when the electrode pad 2A is formed of an aluminum layer having a thickness of 1 to 3 μm and the wire 5 is a copper wire having 25 μm Ø, the wire 5 is loaded with a load of 50 to 100 g. The depth at which 5 is attached to the electrode pads 2A is in the range of 0.5 to 2.5 mu m. In the formation of the bowl 5a, the bowl 5a rises above the melting temperature (for example, 1000 ° C or higher), and the semiconductor chip 2 is brought to the desired temperature (for example, 300 ° C) by the heater 3. While heated, a reducing gas 8 (a gas made of N 2 (95-80%) and H 2 (5-20%) in this embodiment) is supplied to the lower space of the movable cover 6. Accordingly, the surface of the bowl 5a having a temperature of 200 ° C. or more to be placed in the reducing gas 8 is in a reduced state.

그런데 환원성 개스에도 환원력을 상승시킬려면 H2성분을 증가시키는 것이 좋으나, 그 정도가 20% 이상으로 되면 폭발위험성이 있고 5% 이하로 되면 환원력이 떨어지기 때문에, H2: N2의 적정혼합비를 (5~20%) : (95~80%)로 한다.However, to increase reducing power in reducing gas, it is better to increase H 2 component, but if the level is more than 20%, there is a risk of explosion and if the reducing power is less than 5%, reducing ratio of H 2 : N 2 (5 ~ 20%): Let it be (95 ~ 80%).

다음 전극패드(2A)에 동계통와이어(5)의 접합이 끝나게 되면 즉시 캐필러리(4)가 상승하게 되고, 그에 따라 전극패드(2A)위에는 동계통와이어(5)가 똑바로 세워지게 되는바, 즉, 제2도에 도시된 바와 같이 캐필러리(4)의 선단이 산소, 수소토오치(7)의 선단보다 약간 윗쪽에 도달하게 되면 산소, 수소토오치(7)의 화염에 의해 동계통와이어(5)가 절단되어짐과 동시에 절단면끝에 용융상태로된 보올(5a)이 다시 형성켜지게 되는 한편, 전극패드(2A)위에 똑바로 세워진 동계통와이어(5)는 캐필러리(4)내의 동계통와이어(5)와 분리되어져 본딩와이어로 이용되게 된다.Next, when the bonding of the copper wire 5 to the electrode pad 2A is completed, the capillary 4 immediately rises, and thus the copper wire 5 is erected upright on the electrode pad 2A. That is, as shown in FIG. 2, when the tip of the capillary 4 reaches slightly above the tip of the oxygen and hydrogen torch 7, the flame of the oxygen and hydrogen torch 7 causes the same. At the same time as the system wire 5 is cut, the molten bowl 5a is formed again at the end of the cut surface, while the copper wire 5 standing upright on the electrode pad 2A is formed in the capillary 4. It is separated from the copper wire 5 and used as a bonding wire.

이어 산소, 수소토오치(7)가 제2도에서 2점쇄선으로 도시된 바와 같이 윗쪽을 향해 회동하게 되고, 그에 따라 캐필러(4)의 출구로부터 돌출시켜진 동계통와이어(5)의 선단에도 보올(5a)이 형성되어 다음번 본딩작업을 위한 준비가 갖추어지게 되는바, 이 경우에도 가동커버(6)의 구멍(6a)을 통해 가동커버(6)의 아래쪽으로부터 환원성 개스(8)가 화살표와 같이 캐필러리(4)의 선단주위를 흐르기 때문에 와이어(5)의 보올(5a)은 환원된 상태가 되는 것이다.Oxygen and hydrogen torch 7 are then rotated upward as shown by the dashed-dotted line in FIG. 2, and thus the tip of the copper wire 5 protruding from the outlet of the capillary 4 The bowl 5a is formed to prepare for the next bonding operation. In this case, the reducing gas 8 is moved from the lower side of the movable cover 6 through the hole 6a of the movable cover 6. Since the flow around the tip of the capillary 4 as described above, the bowl 5a of the wire 5 is in a reduced state.

한편, 전극패드(2A)위에 똑바로 세워진 본딩와이어(5A)는 도시되지 않은 부재에 의해 제3도와 같이 수평으로 구부려진 다음 가동커버(6)를 이동시켜 반도체칩(2)과 리이드부(1B)와의 주변을 커버(6)로 덮어줌과 더불어, 이 가동커버(6) 아래쪽공간내에 200℃ 이상을 유지하는 환원성 개스(8)를 화살표방햐으로 흘려보내주게 되면, 와이어(5A)의 선단에 형성시켜진 보올(5a)이 환원상태로 유지시켜짐과 더불어 라이드부(1B)의 표면도 환원상태로 되는바, 이 경우에도 리이드부(1B)는 히이터(3)에 의해 200℃ 이상의 일정온도로 가열시켜지게 된다.Meanwhile, the bonding wire 5A standing upright on the electrode pad 2A is bent horizontally as shown in FIG. 3 by a member (not shown) and then moves the movable cover 6 to move the semiconductor chip 2 and the lead portion 1B. The cover 6 is covered with the cover 6, and the reducing gas 8, which is maintained at 200 ° C or higher in the space below the movable cover 6, is flown in the direction of the arrow to form at the tip of the wire 5A. The retained bowl 5a is kept in a reduced state, and the surface of the ride portion 1B is also in a reduced state. In this case, the lead portion 1B is maintained at a constant temperature of 200 ° C. or more by the heater 3. It is heated.

다음 상기 리이드부 (1B)에다 와이어(5A)를 본딩할 때에는 가동커버(6)를 이동시켜 이 가동커버(6)에 형성된 별도의 구멍(6b)을 리이드부(1B)위에 위치하도록 한 다음, 이 구멍(6b)과 함께 연동해서 움직이도록 된 본딩기구(9)를 구멍(6b)을 통해 하강시켜 와이어(5a)의 선단보올(5a)을 상기 리이드부(1B)위에 압접시켜주서나 또는 눌러 녹여줌으로써 리이드를 본딩하게 된다. 이 때 상기 와이어(5A)가 동와이어로 굵기가 25㎛Ø 일때 300 ~ 500 gr의 하중을 가해서 리이드부 (1B)에 보올 (5a)을 20~50㎛깊이까지 눌러붙여주는 것이 바람직하고, 이러한 본딩과정에서도 상기 본딩기구(9)와 보올(5a) 및 와이어(5A)가 환원성 개스(8)에 둘러 쌓여지게 된다. 한편, 제4도에서 부호 10은 본딩기구(9)를 안내하는 안내로울러이다.Next, when bonding the wire 5A to the lead portion 1B, the movable cover 6 is moved so that a separate hole 6b formed in the movable cover 6 is positioned on the lead portion 1B. The bonding mechanism 9, which is intended to move together with the hole 6b, is lowered through the hole 6b to press or press the tip ball 5a of the wire 5a onto the lead portion 1B. By melting, the lead is bonded. At this time, when the wire 5A is 25 mm Ø with copper wire, it is preferable to apply a load of 300 to 500 gr to press the bowl 5a to a depth of 20 to 50 μm to the lead portion 1B. In the bonding process, the bonding mechanism 9, the bowl 5a, and the wire 5A are surrounded by the reducing gas 8. In FIG. 4, reference numeral 10 denotes a guide roller for guiding the bonding mechanism 9.

[발명의 효과][Effects of the Invention]

이상 설명된 본 발명제조 방법에 대한 제조된 반도체장치와 종래의 제조방법에 따른 (즉 금선으로 와이어 본딩한) 반도체장치를 동일조건에서 고온방치한 결과를 비교해보면, 종래의 반도체장치는 400시간에서 전체의 25%가 불량으로 되고 600시간 후에는 모두가 불량으로 되어버리게 되는데 반해, 본 발명에 따른 반도체 장치는 1200시간이 경과한 후에도 불량품발생이 전혀 없었다.Comparing the result of leaving the semiconductor device manufactured according to the present invention manufacturing method described above and the semiconductor device according to the conventional manufacturing method (that is, wire-bonded with gold wire) at high temperature under the same conditions, the conventional semiconductor device is used at 400 hours. While 25% of the total becomes defective and all become defective after 600 hours, the semiconductor device according to the present invention did not generate any defective products even after 1200 hours.

한편, 종래 반도체장치와 본 발명에 의해 만들어진 반도체장치에 대해 열싸이클시험과 와이어(5)의 기계적 강도시험을 실시하여 비교해본 결과, 열싸이클 시험에서도 본 발명에 따른 반도체장치는 종래의 반도체장치보다 훨씬 더 좋은 결과를 나타내었고, 또 와이어(5) 인장강도에 있어서도 동선와이어로 만들어진 경우가 종래의 금선와이어로 만들어진 것보다 2~2.5배 정도의 강도를 나타내었고, 특히 동합금선(구리 20% 함유)인 경우에는 종래 금선와이어의 경우보다 3~5배가 되는 강도를 나타내고 있음을 알 수 있었다.On the other hand, the heat cycle test and the mechanical strength test of the wires 5 were compared with the conventional semiconductor device and the semiconductor device made by the present invention. As a result, even in the heat cycle test, the semiconductor device according to the present invention is better than the conventional semiconductor device. It showed much better results, and in the tensile strength of the wire (5), the copper wire was about 2 to 2.5 times stronger than the conventional gold wire, especially copper alloy (20% copper) In the case of), it can be seen that the strength is 3 to 5 times higher than that of the conventional gold wire.

이상의 실시예로부터 분명히 알수 있듯이 본 발명에 의하면, 첫째, 종래의 반도체장치보다 열싸이클이나 고온방치조건에 대해 내구성이 극히 높은 반도체장치가 만들어지게 되고, 둘째, 종래의 반도체보다 재료비용이 저렴할 뿐만 아니라 원료에 대한 제품완성율이 높아 결국 저렴한 비용의 반도체장치를 실현할 수 있으며, 세째, 신뢰성이 좋은 대규모전력용의 수지봉함형 반도체장치를 실현할 수가 있게 된다.As is apparent from the above embodiment, according to the present invention, first, a semiconductor device having extremely high durability against heat cycles or high temperature standing conditions is made than a conventional semiconductor device, and secondly, a material cost is lower than that of a conventional semiconductor device. As the product completion rate for the raw material is high, a low cost semiconductor device can be realized. Third, a resin-type semiconductor device for large-scale power supply with high reliability can be realized.

한편 상기와 같은 실시예에서는 와이어(5)의 절단과 보올(5a)의 형성을 산소, 수소토오치(7)로 수행하는 경우만을 설명하였으나, 레이저토오치나 전기토오치를 사용해도 좋다. 그리고 본 발명의 실시예는 그에 한정되는 것이 아니라 여러가지로 변형시켜 실시할 수 있음도 물론이다.Meanwhile, in the above embodiment, only the case where the cutting of the wire 5 and the formation of the bowl 5a are performed with oxygen and a hydrogen torch 7 is described, but a laser torch or an electric torch may be used. In addition, the embodiment of the present invention is not limited thereto, but may be modified and practiced in various ways.

Claims (1)

반도체칩(2)의 전극패드(2A)와 리이드부(1B)를 접속시키는 본딩와이어로서 동선이나 동합금선 등과 같은 동계통와이어(5)를 사용해서 반도체장치를 제조하는 방법에 있어서, 상기 동계통와이어(5)의 선단부에 용접용 보올(5a)을 형성시킨 다음 이 보올(5a)을 200℃ 이상의 환원성 개스(8)로 환원시켜 전극패드(2A)또는 외부리이드부(1B)에다 접속시키도록 된 것을 특징으로 하는 반도체장치의 제조방법.A method of manufacturing a semiconductor device using a copper wire (5) such as copper wire or copper alloy wire as a bonding wire for connecting the electrode pad (2A) and the lead portion (1B) of the semiconductor chip (2). A welding bowl 5a is formed at the tip of the wire 5, and then the bowl 5a is reduced to a reducing gas 8 of 200 ° C or more to be connected to the electrode pad 2A or the external lead 1B. A method of manufacturing a semiconductor device, characterized in that
KR1019850004374A 1984-07-27 1985-06-20 Manufacture of semiconductor device KR900005348B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59-155591 1984-07-27
JP15559184A JPS6135545A (en) 1984-07-27 1984-07-27 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
KR860001477A KR860001477A (en) 1986-02-26
KR900005348B1 true KR900005348B1 (en) 1990-07-27

Family

ID=15609376

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850004374A KR900005348B1 (en) 1984-07-27 1985-06-20 Manufacture of semiconductor device

Country Status (2)

Country Link
JP (1) JPS6135545A (en)
KR (1) KR900005348B1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3129169B2 (en) * 1995-11-08 2001-01-29 富士通株式会社 Semiconductor device and manufacturing method thereof

Also Published As

Publication number Publication date
JPH0325019B2 (en) 1991-04-04
KR860001477A (en) 1986-02-26
JPS6135545A (en) 1986-02-20

Similar Documents

Publication Publication Date Title
US4732313A (en) Apparatus and method for manufacturing semiconductor device
US4674671A (en) Thermosonic palladium lead wire bonding
US3672047A (en) Method for bonding a conductive wire to a metal electrode
EP0178170B1 (en) Semiconductor device having a bonding wire and method for manufacturing it
CN100375278C (en) Semiconductor device and its mfg. method
US8604627B2 (en) Semiconductor device
CA1220877A (en) Method of making contact to semiconductor device
EP1367644A1 (en) Semiconductor electronic device and method of manufacturing thereof
US20140374467A1 (en) Capillary bonding tool and method of forming wire bonds
KR900005348B1 (en) Manufacture of semiconductor device
US5087590A (en) Method of manufacturing semiconductor devices
JP2015144199A (en) semiconductor device
KR900000205B1 (en) Method for assembling semiconductor element
JPH0546271Y2 (en)
JPS6197937A (en) Method for assembling semiconductor element
JPS60177639A (en) Manufacture of semiconductor device
JPS6379331A (en) Wire bonding equipment
JPS61253824A (en) Semiconductor element assembling method
KR19990038014U (en) Electrical Discharge Rods for Wire Bonding Equipment for Semiconductor Package Manufacturing
JPH01106454A (en) Resin sealed semiconductor device
JPH05326602A (en) Solder bonding method
JPS60167436A (en) Wire bonding method and capillary used therefor
JPS63104341A (en) Manufacture of semiconductor device
JPS6153738A (en) Semiconductor device
JPS62219935A (en) Wire bonding equipment

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20030701

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee