KR900004048B1 - Bill counter - Google Patents

Abstract

The counter includes an auto starter (1) for detecting bill in a bill loader and for generating detecting signal, a break, clutch, and motor driver (3,4,5) for controlling motor (M), clutch (CL), and break (BK) with certain intervals according to the detecting signal, a counter (11) for counting number of bill passing through a first and a second passage detector (6,7), a display (27) for displaying counted value and false operation, a detector (13) for stopping motor when counted value reaches a set value, a two fold detector (14) for detecting two fold a jam detector (15) for detecting bill jam, and an error classifir (21) for classifying and displaying error.

Description

Banknote counter

1 is a block diagram according to the present invention.

2 is a detailed circuit diagram according to the present invention.

3 is a waveform diagram according to the present invention.

* Explanation of symbols for main parts of the drawings

1: Automatic start driving unit 2: Instrument operation control unit

3: brake driving unit 4: clutch driving unit

5: Motor drive part 6, 7: First and second paper money passing detector

8: Amplifier 9: Waveform Comparator

10: waveform shaping unit 11: counter

12: Count number setting unit 13: Set value arrival detection unit

14: overlap detection unit 15: jam detection unit

16,17: 1st, 2nd counter-detection unit 18: continuous bill detection unit

19: reference oscillator 20: flip-flop unit

21: Error classification section 22: Reset section

23: restart drive unit 24: buzzer

25: idle detection unit 26: display flashing unit

27: display device 28: automatic repeat drive unit

29: transmission amount adjusting unit 30: counter

[Industrial use]

The present invention relates to a bill counter, in particular, not only can accurately count the number of banknotes inserted even with a simple operation, but also bad banknotes (two or more overlapping banknotes, half-length banknotes, two or more continuous connection pass banknotes) are generated or counted In the event of a malfunction, such as a jam stuck inside the machine, a bill counter can be displayed quickly on the display device, generating an alarm sound through a buzzer and flashing the displayed numbers and letters. will be.

[Traditional Technology and Problems]

The banknote counter introduced in the related art uses electronic control circuits only for motors for rotating the rollers installed to help convey the banknotes, and most of the main devices are mechanical. When paper is jammed or jammed inside the machine, a malfunction occurs in the bill counter, and the number of bills could not be accurately counted. Also, the number of bad bills may be counted the same as the normal bills. The reliability was lowered, and the conventional bill counter did not have proper countermeasures against such malfunctions, which often caused problems for users.

[Purpose of invention]

The present invention has been invented in view of the above-mentioned point, and counts the number of bills and displays them on a display device, and when two or more stacked bills (hereinafter referred to as a stacked bill) are inserted or two or more bills are continuously connected ( In the event that a malfunction occurs such as when a banknote inserted into the counter (hereinafter referred to as a semi-note banknote) is inserted, or when a banknote is jammed inside the counter (jam), the display device is turned on. By displaying various types of malfunctions and sounding an alarm, at the same time, it is possible to prevent miscounts caused by malfunctions by indicating various counting operations, and counting any kind of bills regardless of the geology of bills. The purpose is to provide an improved bill count.

[Configuration of Invention]

The present invention for achieving the above object, the comparison of the comparator (OP ₅ ) and the comparator (PO ₅ ) to detect the presence or absence of banknotes loaded on the input bank loading portion by the reflected light sensor (S ₃ ) Once the output is associated consists of a NOR gate (NOR ₁₎ and the NOR gate (NOR _2), one end is connected to the output terminal of the NOR gate (NOR ₁₎ and automatically start the driving (1) that was output to the bill detection signal, wherein the brake drive unit in accordance with the NOR gate (NOR ₂₎ bills to mediate the mechanism operating the control unit (2) connected to the output terminal of the detection signals the motor (M) and the clutch (CL) and the brake (BK) to give to the control with a predetermined time difference ( 3) First and second banknote passing detectors 6 and 7 which detect the passage state of bills by the clutch driver 4, the motor driver 5, and the sensors S ₁ and S ₂ . The first and jungpok group of the second bill passage detecting section 6, the output is amplified in 7 parts _{(8) (OP 3) (} OP 4) and the amplifier (OP ₃₎ waveform is connected to the output terminal of the (OP ₄₎ A counter 11 and an counter 11 connected to count the number of bills passing through the first and second paper money passing detectors 6 and 7 via the comparison unit 9 and the waveform shaping unit 10 in order. The count count setting unit 12 connected to set the expected count value to the display device 27 and the display device 27 connected to display the count value and the malfunction state, and the count end motor between the counter 11 and the mechanism operation control unit 2). Comparator OP ₁ (OP ₂ ) is connected to an output terminal of the set value arrival detector 13 and the first and second paper money passing detectors 6 and 7 connected to stop (M) to output an output signal. Comparing the waveform to detect the jam state of the bill according to the output phase, the overlap detection unit 14 for detecting the overlapping bill compared to the reference signal Jam detection unit l5 connected to the output terminal of the noah gate NOR ₅ of the unit 9 and first and second semi-volume detection units connected to the NAND gate ND ₆ of the waveform comparison unit 9 so as to detect the semi-circle banknotes. (16) (17) and a reference oscillation unit connected to one input terminal of the NOR gate NOR ₁₆ of the continuous bank detection unit l8 whose output terminal of the continuous bank detector 18 and the NAND gate ND ₂₄ are connected to detect the continuous bank 19, the overlap detection unit 14 and the jam detection unit 15, the first and second semi-circle detection unit 16 and 17 and the continuous paper money detector 18 display the state thereof in accordance with their malfunction detection. The output terminal of the NOA gate NOR ₁₄ is connected to the flip-flop unit 20, the error classifying unit 21, and the counter 11 connected to generate an indication and an alarm sound, and reset the counter 11. To the reset section 22 for resetting the counter 11 and the reset section 22 for restarting the motor M when the malfunctioning factor is removed. Connected to the respective output terminals of the restart drive unit 23, the second half winding detection unit 17, the mechanism operation control unit 2, and the reset unit 22 to detect the idle of the motor M, and transmit the detection signal to the mechanism operation control unit. (2) and the idle detection unit 25 connected to send out to the buzzer 24, and connected to each of the output terminal of the reset unit 22, the idle detection unit 25 and the counter 11, and buzzer sounds In addition, the display device 27 is composed of a buzzer 24 and a display flashing unit 26 to blink the display symbol.

[Action]

According to the present invention configured as described above, the banknotes can be counted by a predetermined number while automatically counting the banknotes, and then the banknotes remaining in the input banknotes loading unit can be automatically counted again as soon as the continuous banknotes are removed from the banknotes loading unit. Not only can the count be counted according to the geology of the bill, but also when the error occurs, the counting operation can be stopped and the type of error can be displayed.

Example 1

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram according to the present invention, when a banknote is loaded in an input bank loading unit (not shown), the automatic start driving unit 1 detects this and drives the mechanical operation control unit 2 to operate the mechanical operation control unit. (2) drives the brake drive unit 3, the clutch drive unit 4, and the motor drive unit 5 with a certain time difference, and accordingly, the motor M, the clutch CL, and the brake BK are properly driven. The number of bills to be conveyed is detected by the bill pass detector 6 and 7 and counted by the counter 11, and the counted number is displayed on the display device 27. Will be displayed on.

When the count number setting unit 12 is connected to the counter 11 of the counter circuit operated in this manner, and the counter 11 presets the count value that the counter 11 can count, the count value of the counter 11 is preset. When the value reaches the counter 11, the count end signal is sent to the motor M, the clutch CL, the brake BK, etc. via the mechanism operation control unit 2 to stop all operations for the bill counting. As a result, the user can count as many bills as the user wants.

If an error (overlapping banknote, continuous banknote, counter-note banknote, jam, etc.) occurs during the counting operation, the combination detecting unit 14, the jam detecting unit 15, the first and second half-field detecting units 16, 17), the error detecting signal is sent from the continuous bank detection unit 18 and input to the error classification unit 21 through the flip-flop unit 20. Accordingly, the error classification unit 21 displays the type of the error. In addition to displaying through the device 27, by operating the buzzer (BZ) in the buzzer (24) to notify that an error has occurred, while operating the motor (M), clutch (CL) and brake (BK) bills counting It will stop the operation.

2 is a detailed circuit diagram according to the present invention, in which small triangles and squares connected to the end of each circuit represent an operation power supply terminal.

First, a normal bill counting operation will be described.

Prior to the bill counting operation, if the set value of the count sheet setting unit 12 is set to "0", the counter 11 counts all bills loaded in the banknote stacking unit, and the count sheet setting unit 12 By operating a dip switch (not shown) to set the amount that the counter 11 can count, that is, the number of bills to be counted, the counter 11 matches the set value as described below. When the count end signal is output through the terminal (E), only the set number of sheets is counted. When the number of counted bills is less than the set value, the buzzer 24 is driven and the display device 27 The numbers and letters displayed on the screen will blink.

The number of bills to be counted in this way is preset in the counter 11, and then counted so that the luminous signal of the reflection sensor S ₃ in the auto start driving unit 1 is transmitted to the light receiving part by the reflection of the bills to be loaded. When a random number of bills is placed on the input bank loading unit (not shown), which is a place where the banknotes are placed, the light emitting signal of the reflection sensor S ₃ is reflected and reflected by the banknotes placed on the input bank loading unit. When the light receiving transistor of the sensor S ₃ is turned on, the pulse signal output from the output terminal P15 of the counter 11 is input to the non-inverting terminal of the comparator OP ₅ through the reflection sensor S ₃ . A series of pulse signals output from the comparator OP ₅ are smoothed to a DC voltage by a diode D _l and a capacitor C ₁ to a high level voltage, and then applied to one input terminal of the NOA gate NOR ₁ . Is entered. Accordingly, NOR gate (NOP ₁₎ in the output a low level signal there is inputted to one input terminal of the NOR gate (NOR _2), wherein the row as early described later on to the other input terminal of the NOR gate (NOR ₂₎ Since the high level signal is output from the NOR gate NOR ₂ since the level signal is input, the negative differential pulse is transmitted from the NAND gate ND ₂ to the clock terminal CK of the D flip-flop FF ₁ . The signal is input.

Here, the negative differential pulse signal is input to the clock terminal CK of the D flip-flop FF ₁ .

)에서 로우레벨신호가 출력되어 브레이크구동부(3)와 클러치구동부(4) 및 모터구동부(5)로 각각 공급된다. 따라서 브레이크(BK)가 해제되고 나서 모터(M)가 회전하기 시작하고, 이어 클러치(CL)가 물리게 되는 동작이 순차적으로 일어나게 된다.The output terminal of the D-type flip-flop (FF ₁₎ of the reset stage (R) is by the negative differential pulse signal because it is set to the initial low level signal is supplied to the D-type plum-flop (FF ₁₎ (Q) High level signal is output from

The low level signal is outputted to the brake drive unit 3, the clutch drive unit 4, and the motor drive unit 5, respectively. Therefore, after the brake BK is released, the operation of the motor M starts to rotate, and then the clutch CL is engaged.

Therefore, the bill counting mechanisms (not shown) are operated to count the bills conveyed by transferring the bills one by one in the circuit of this embodiment, wherein the brake BK, the motor M, and the clutch CL are brake driving units. (3) and the motor driver 5 and the clutch driver 4 are sequentially controlled by the time constant of the time constant circuit composed of a resistor and a condenser, respectively, so that the bill counter mechanisms can operate smoothly.

On the other hand, the number of bills to be conveyed can be detected by providing the sensors S ₁ and S ₂ of the first and second bill passing detectors 6 and 7 in the passages through which the bills are conveyed. The sensor (S ₁ ) (S ₂ ) is installed in each of the left and right side of the bill passes by the same signal is output from both sensors (S ₁ ) (S ₂ ) at the same time when the normal bill passes. Thus when the same sensors (S ₁₎ (S ₂₎ to the bill one by one pass through the sensor (S ₁₎ (S ₂₎ light-receiving side is the negative polarity pulse having a constant width of each pass around the lungs occurs continuously amplification of It is to be input to the section (8). The series of negative pulses are amplified by the amplifier 8 and then the waveform comparator 9 through the waveform shaped section 10 and the waveform of the counter 11 through the noah gate NOR ₈ . As input to CK, the counter 11 counts the number of input pulses and displays the count value through the display device 27. Therefore, the user can visually check the number of bills being counted up to that point.

In this way, the banknotes which are transferred from the input banknote book and passed through the sensors S ₁ and S _{2 of} the first and second paper currency detectors 6 and 7 are placed in the banknote paper stack (not shown). In this case, the banknote loaded with the output bank blocks the light emission signal of the repetitive sensor (S ₄ ) in the automatic repeat drive unit 28 so that the light receiving transistor is turned off and the NAND connected to the light receiving transistor. The low signal is output through the gate ND ₄ .

On the other hand, when all the banknotes stacked in the input bank loading part are counted in this way, the light emitting part side signal of the reflection sensor S ₃ installed in the auto start driving part 1 is not transmitted to the light receiving part side, and the reflection When the light receiving transistor of the sensor S ₃ is turned off, the non-inverting terminal of the comparator OP ₅ is inputted by dividing the operating voltage V ₂ by the resistors R ₁ and R ₂ , and the resistance R ₃ to the inverting terminal. The operating voltage V ₂ is bisected by R ₄ .

Since the voltage divided by the resistors R ₃ and R ₄ is higher than the voltage divided by the resistors R ₁ and R ₂ , the low level signal is output from the comparator OP ₅ . Will be. The low level signal is input to one input terminal of the NOA gate NOR ₁ , and the high level signal output from the D flip-flop FF ₁ is input to the other input terminal of the NOA ART art NOR ₁ . Since the low level signal is output from the NOR gate NOR ₁ , it is input to one input terminal of the NOR gate NOR ₂ .

And one input terminal of the other input terminal of the NOR gate, so that from the (NOR ₂₁₎ a low level signal is input is the output high-level signal in the NOR gate (NOR ₂₎ a NAND gate (ND ₁₎ of the NOR gate (NOR ₂₎ is input to, this time NAND clock terminal of the gate (ND ₁₎ the other side to the input high-level signal input terminals being a NAND gate a low level signal output from the (ND ₁₎ is a differential D flip-flop (FF ₁₎ of the ( CK).

Thus, in the D flip-flop FF ₁ , the output signal is switched by this clock signal. That is, after all banknotes in the input banknote loading part are transferred, there are no more banknotes passing through the banknote passing detectors 6 and 7. Therefore, the high level signal is continuously output from the output terminal of the sensor S ₁ (S ₂ ) which detects the banknote passage, so that the low level signal is output from each output terminal of the amplifier 8, and then the waveform comparison unit A high level signal is output from the NAND gate ND _{6 of} FIG. 9, inverted to a low level from the NAND gate DN ₂₁ , and then input to one input terminal of the NOR gate NOR ₂₂ of the idle detector 25. .

)에서는 로우레벨신호가 출력되게 되고, 이에 따라 낸드게이트(ND₈)에서는 하이레벨신호가 출력되어 기구동작제어부(2)에 있는 플립플롭(FF₁)의 리셋트단(R)에 입력되게 된다.The other input terminal of the NOR gate (NOR ₂₂₎ is because it is state of the flip-flop a low level signal from the output terminal (Q) of (FF ₂₎ in the apparatus operation control unit 2 is input to the NOR gate (NOR ₂₂₎ a high level signal is output. the output terminal of the signal resistor (R ₁₁₎ and a flip-flop (FF _4), because thereby set the next flip-flop (FF ₄₎ delayed by the time set by the capacitor (C ₁₁₎ (

), A low level signal is output, and accordingly, a high level signal is output from the NAND gate ND ₈ to be input to the reset terminal R of the flip-flop FF ₁ in the mechanism operation control unit 2. .

)의 신호가 로우레벨에서 하이레벨로 반전되어 모터(M)를 정지시키기 위한 기구적인 동작이 이루어지게 된다. 즉 브레이크구동부(3)와 클러치구동부(4) 및 모터구동부(5)가 동작되어 클러치(CL)와 브레이크(BK) 및 모터(M)를 일정시차를 두고 순차적으로 동작시켜 지폐이송 및 계수동작을 중지시키게 된다.Therefore, as described above, in the flip-flop FF ₁ , when the negative differential pulse is input to the clock terminal CK and a high level signal is applied to the reset terminal R, the output is inverted. Output stage

) Signal is inverted from the low level to the high level so that a mechanical operation for stopping the motor M is performed. That is, the brake driving unit 3, the clutch driving unit 4, and the motor driving unit 5 are operated to sequentially operate the clutch CL, the brake BK, and the motor M with a certain time difference, thereby transferring the bills and counting. Stopped.

The above operation is equally applicable to the idling when the reflection sensor S ₃ in the auto start drive unit 1 malfunctions by foreign matter or other objects to drive the motor M. That is, even if the reflection sensor S ₂ malfunctions to operate the motor M as described above, at this time, whether the sensor passes through the sensor S ₁ (S ₂ ) in the bill passing detectors 6 and 7 is closed. Since there is no state as soon as the above operation is made it is possible to stop the motor (M).

)에서 로우레벨신호가 출력되어 낸드게이트(ND₅)(ND₆)(ND₇)를 통해 에러분류부(21)로 입력됨으로써 디스플레이장치(27)중 문자표시용 세그먼트에 예컨데 "P"자를 표시해 주게 되어 카운트된 지폐매수가 프리셋값에 도달되었음을 알려주게 되고, 이와 동시에 낸드게이트(ND₅)(ND₆)(ND₇)를 통해 D형플립플롭(FF₁)의 리셋트단(R)에 입력되는 하이레벨신호에 의해 D형 플립플롭(FF₁)의 출력단(Q)(

)에서각각 로우레벨신호와 하이레벨신호가 출력됨으로써 상기한 바와 같이 클러치(CL)와 브레이크(BK) 및 모터(M)가 일정시차를 두고 순차적으로 동작하게 되어 지폐이송 및 계수동작이 중지되게 된다.On the other hand, when the count number setting unit 12 reaches the preset value set in the counter 11 and stops bill transfer and counting operation, the output terminal Z of the counter 11 at this time is high. Level signal is output and preset output stage (

A low level signal is outputted from the NAND gate to the error classification unit 21 through the NAND gates ND ₅ (ND ₆ ) and ND ₇ so as to display, for example, a “P” character on the character display segment of the display device 27. The number of bills to be counted is notified that the preset value has been reached, and at the same time, the reset end R of the D-type flip-flop FF _{1 is} provided through the NAND gates ND ₅ (ND ₆ ) and ND ₇ . The output terminal Q of the D-type flip-flop FF ₁ (

The low level signal and the high level signal are respectively output from the clutch CL, the brake BK, and the motor M, which are sequentially operated with a certain time difference, thereby stopping the bill transfer and counting operation. .

Next, the overlap detection function will be described.

At this time, since two or more banknotes are in a state of passing through the sensors S ₁ and S _{2 in} the first and second paper money passing detectors 6 and 7, the light emitted by the sensors S ₁ and S ₂ is emitted. More than one optical signal transmitted from the negative side to the light receiving side is blocked more.

Therefore, the potential of the inverting terminal of each comparator (OP ₁₎ (OP ₂₎ in gyeopjang detector 14 is dropped to a potential below have set, the non-inverting terminal when normally from each comparator (OP ₁₎ (OP ₂₎ a pulse signal of high level is output, the pulse signal of the high level buffer (B ₄₎ (B ₅₎ the coarse following NAND gate (ND ₉₎ is reversed to a negative pulse signal from the NOR gate (NOR ₉ consisting of the inverter ) Is entered.

)에서 각각 로우신호와 하이신호가 출력되도록 함으로써 전술한 바와 같이 클러치(CL)와 브레이크(BK) 및 모터(M)를 일정시차를 두고 순차적으로 제어해서 지폐이송 및 계수동작을 중지시키게 된다. 또한 노아게이트(NOR₁₂)에서 출력되는 로우레벨신호가 부저부(24)로 입력됨으로써 부저부(24)에 있는 부저(BZ)가 동작되어 에러가 발생되었음을 알려 주게 된다.The output signal of the NOA gate NOR ₉ drives the error classification unit 21 through the flip-flop unit 20 to display, for example, a letter “D” on the character display segment of the display device 27 and the NOA gate. The counter 11 is reset via (NOR _{10 to} NOR ₁₄ ), and the NAND gate ND ₈ of the mechanism operation control unit 2 is supplied to the low level output signal of the NOA gate NOR ₁₂ . Of the D-type film-flop (FF ₁₎ reset stage D-type flip-flop (FF ₁₎ to the input (R) of the through output terminal (Q) (

By outputting the low signal and the high signal, respectively, as described above, the clutch CL, the brake BK, and the motor M are sequentially controlled at a predetermined time to stop the banknote transfer and counting operation. In addition, the low level signal output from the NOA gate NOR ₁₂ is input to the buzzer 24, thereby operating the buzzer BZ in the buzzer 24 to inform that an error has occurred.

)로 출력되는 발진신호에 의해 점멸됨으로써 이상상태가 발생되었음을 감지하기가 용이하도록 되어 있다.In addition, the letter "D" displayed on the display device 27 is the chip select terminal of the error classifying unit 21 at the NOA gate NOR ₁₇ of the display flashing unit 26.

By flashing by the oscillation signal outputted by), it is easy to detect that an abnormal state has occurred.

If such an error has occurred, there is no credibility as to whether the number of bills loaded on the payout banking unit matches the count value displayed on the display device 27.

Therefore, when the switch SW ₁ of the restart drive unit 23 is operated after taking out the banknotes loaded in the discharge bank loading unit, the high level pulse signal is transmitted from the NOR gate NOR ₁₅ , and thus, the NAND gate DN ₁₃ A low level pulse signal is output. The low level pulse signal resets the counter 11 through NAND gates ND _{14 to} ND ₁₅ and NOR gate ₁₄ , and D through NAND gate ND ₁ . By driving the type flip-flop FF ₁ , the paper money transfer and bill counting operations are performed again as described above.

Next, the jam detection function for the state in which the banknote being transported is trapped inside the bin will be described.

When the normal banknote passes through the sensors S ₁ and S _{2 in} the first and second paper money passing detectors 6 and 7, as described above, the first and second paper money passed detectors 6 ( 7) A series of pulse signals are output, but if paper money is jammed inside the machine, the paper money jammed inside the paper money will continue to block the light of one or more of the two sensors (S ₁ ) (S ₂ ). The low level signal is continuously output from one of the at least two sensors S ₁ and S ₂ .

Therefore, a high level signal is continuously output from one or two comparators of the comparators OP ₃ and OP ₄ in the amplifying unit 8, and the high level signal is input to the noar gate NOR ₅ . ₅ ), the low level signal is continuously output.

As such, the low level signal output from the NOR gate NOR ₅ is applied to the reset terminal of the counter 11 through the NAND gates ND ₁₇ (ND ₁₈ ) and the NOR gate NOR ₁₃ (NOR ₁₄ ). In addition to the reset (11), the NAND gate is inverted to a high level by the ND ₁₉ to charge the capacitor C ₁ through the resistor R ₂ in the jam detection unit 15. _When the voltage charged in ₁ ) rises to a high level potential, a high level signal is applied to the set terminal S _{4 of the} flip-flop unit 20, so that the high level signal is applied at the output terminal Q ₄ of the flip-flop unit 20. The level signal is output.

Accordingly, the error classification unit 21 detects that a jam has occurred, and outputs the jam detection signal to the display apparatus 27 to display, for example, the letter "J" on the character display segment of the display apparatus 27 so that the jam is displayed. It will indicate that it has occurred. Even in this case, the same operation as that of the above-described double-sheet detection function, that is, an operation such as stopping a bill transfer and counting operation and a buzzer operation is performed.

In addition, when the bill counting operation is to be driven again, the counter 11 is reset and normal when the switch SW ₁ of the restart driving unit 23 is operated in the same manner as in the case of the stacking paper detecting function described above. Banknote counting operation is made.

Next, a description will be given of the function of detecting anti-note bills in which a part of bills are cut off.

Counter-note bills are classified into two types, and assuming that the long side of the bill is transversely, bills cut in the vertical direction and bills cut in the horizontal direction are respectively detected as counter-note bills.

First, with reference to Fig. 3, detection of an error due to counter-note billing, a part of which is cut off in the longitudinal direction, will be described. When the counter-note bill passes through the sensor S ₁ (S ₂ ), one sensor, for example, the sensor S ₁ , outputs a low level pulse signal as in (3-1), as in the case of passing a normal bill. In the other sensor, for example, the sensor (S ₂ ) is a part that is cut is passed through it is not able to detect whether the bill passes, so the high level signal is continuously output as shown in (3-2).

Accordingly, the low level pulse signal output from the first paper currency detector 6 and the high level signal transmitted from the second paper money detector 7 are respectively supplied to the comparator OP ₃ (OP ₄ ) in the amplifier 8. the inputs are the comparator (OP ₃₎ and the reversal jungpok a pulse signal with a high level as shown in (3-3), a comparator (OP ₄₎ in turn into a pulse signal of a low level as shown in (3-4), and then jungpok buffer (B ₆ ) (B ₇ ) are input to the NAND gate ND ₆ and the NOR gate NOR ₅ in the waveform comparison unit 9, respectively.

At this time, a high level pulse signal is output from one of the comparators OP ₃ and OP ₄ in the amplifier 8 and a low level pulse signal is output from the other comparator. The NAND gate (ND ₆ ) in (9) continues to output a high level pulse signal as shown in (3-5), and the low level pulse signal as shown in (3-6) at a noah gate (NOR ₅ ). Will be.

The NOR gate a low level signal output from the (NOR _5), a capacitor (C ₃₁₎ is a differential, such as (3-7) through a flip-flop (FF ₃₎ flip-flop by being applied to the clock stage (FF ₃ in (CK) of At the output terminal Q of), a high level signal is output as shown in (3-8). Accordingly, the output signal of the flip-flop FF ₃ such as (3-8) and the output signal of the noah gate NOR ₅ such as (3-6) are inputted to both input terminals of the NAND gate ND ₂₀ . At the output terminal of (ND ₂₀ ), a signal falling from the high level to the low level is output as shown in (3-9) and input to one input terminal of the NAND gate ND ₂₂ .

At this time, since the high level signal is normally input to the other input terminal of the NAND gate ND ₂₂ from the NAND gate ND ₂₅ of the first half winding detection unit 16 as described later, the output terminal of the NAND gate ND ₂₂ Likewise, a signal rising from a low level to a high level is output. In this case, the rising high level signal is input to the set terminal S ₂ of the second flip flop in the flip flop unit 20 to supply the high level signal to the error classifying unit 21 through the output terminal Q ₂ . As a result, the error classification unit 21 detects that the counterfeit bill has passed, and outputs the counterfeit detection signal to the display apparatus 27 to display, for example, an "H" character on the character display segment of the display apparatus 27, thereby counterfeit. It will indicate that it passed.

In addition, by the signal input to the NOA gate NOR ₁₀ , the same operation as in the above-described functions, namely, the movement of the bill transfer and counting operation, the blinking of the display character of the display device 27, and the reset of the counter 11 are performed. The operation of the buzzer operation is performed, and the bill counting operation can be restarted by operating the switch SW ₁ in the restart driving unit 23.

Next, the detection of an error by the counter-note bill cut out a part of it in the horizontal direction will be described.

In this embodiment, the semi-circle banknote whose part is cut off in the transverse direction refers to a banknote which is less than 16/40 when one banknote is divided horizontally, for example, by 40 equals. Although it is for detecting, in the description of the present embodiment, a detection function for defective banknotes equal to or less than 16 is described. However, by adjusting the frequency of the reference oscillator 19 or the like, it is possible to detect counter-note bills equal to or greater than 16.

In the present embodiment, the counter 31 used to detect the counter-volume banknote sends a high level signal through the output stage Q ₅ when 16 or less than 32 clock pulses are input, and 64 counters are used. When less than 128 clock pulses are input, the high level signal is transmitted through the output terminal Q ₇ .

When the counter-note bill passes through the sensors S ₁ and S ₂ of the first and second bill passing detectors 6 and 7, each sensor S ₁ and S ₂ is more than normal bills. A low level pulse signal having a narrow pulse width is output, and the low level pulse signal is inverted and amplified by a narrow high level pulse signal by a comparator OP ₃ (OP ₄ ) of the amplifier 8. Next, the waveforms are input to the continuous paper money detector 18 and the first half-tone detector 16 through the waveform comparison unit 9 and the waveform shaping unit 10, respectively.

Here, the continuous bank detector 18 is provided with a counter 31 and a NOA gate ₁₆ , and one end of the input is connected to a reference oscillator 19 oscillating at a predetermined frequency. Therefore, in the counter 31, the reference clock of the reference oscillator 19 input through the NOR gate NOR ₁₆ while the narrow low level pulse signal is being input to the reset terminal R of the flip-flop FF2. In this case, the output signal is counted. In this case, since the counted value is less than 16, for example, a low level signal is output from the output terminal Q ₅ , and the low level signal is outputted to the reset stage of the flip-flop FF ₂ . as the input to R) in the flip-flop (FF ₂₎ is output from the waveform shaping section 10, an output terminal of the flip-flop (FF ₂₎ by a signal input to the clock stage (CK) (Q) attains a high level .

In this case, since the output of the waveform shaping unit 10 is also switched to the high level, the low level signal is output from the NAND gate ND ₂₅ , so that the high level signal is output from the NAND gate ND ₂₂ , and thus the NOR gate NOR. ₁₀ ) and the high level signal is input to the set terminal S ₂ of the flip-flop unit 20, respectively, so that the following operation is the same as when the banknote is partially cut in the vertical direction as described above. Get up.

That is, for example, "H" is displayed on the character display segment of the display device 27, the character and the display value blink, the bill transfer and counting operation are stopped, and the buzzer BZ rings.

Next, a description will be given of error detection in the case where the continuous bills, that is, two or more bills are continuously connected without a predetermined time interval and pass through the sensor S ₁ (S ₂ ). In this case, in the present embodiment, as in the detection operation of the counter-note banknote, a part of which is cut off in the horizontal direction, when the banknote is divided into 40 equal parts, banknotes of 64/40 or more are detected as continuous banknotes.

When such continuous bills pass through the sensors S ₁ and S ₂ of the first and second bill passing detectors 6 and 7, each sensor S ₁ and S ₂ is more than normal bills. A pulse signal of a low level having a wide pulse width is output, and this wide signal is passed through the path as described above to the counter 31 and the noar gate NOR ₁₆ of the continuous paper money detector 18. As input to one input terminal, the counter 31 receives a wide oscillating pulse signal of a wide low level while being outputted to the reset terminal R of the flip-flop FF ₂ through the reference oscillator NOR ₁₆ . The reference clock output signal of (19) is counted. In this case, the high level signal is output from the output terminal Q ₇ because the counted value exceeds 64/40 of the predetermined value, i.e., 40 equal bills. The NOA gate NOR ₁₀ and the set terminal S ₁ of the flop flop unit 20 are input.

This next operation is performed in the same operation as when the above-described errors are detected. For example, "C" is displayed on the character display segment of the display device 27 to indicate that an error has occurred due to continuous billing. In addition, the letter and number displayed on the display device 27 are blinked by the operation of the display blinker 26, and the buzzer BZ of the buzzer 24 is operated to indicate that an error has occurred, and the bill transfer and counting operation is also performed. Will be stopped.

On the other hand, the resistor Rf ₁ (Rf ₂ ), the variable resistor VR and the banknote concentration to adjust the reference voltage input to the non-inverting terminal to the comparator OP ₁ (OP ₂ ) to the overlap detection unit 14. By connecting the transmission amount adjusting unit 29 consisting of the selection switch (SW ₂ ) it is possible to improve the detection reliability of the sensor (S ₁ ) (S ₂ ) according to the type and geology of various bills in Korea.

In addition, in the embodiment of the present invention performing the counting operation and the error detection operation as described above, the instrument operation control unit 2 has a repetitive sensor (S ₄ ), a NAND gate (ND ₄ ), a resistor (R ₄₁ ) (R ₄₂ ) and An automatic repeat drive unit 28 equipped with a condenser C ₄₁ is connected, where the repetitive sensor S ₄ is installed on the side of the payout bank, which is counted by one or more bills from the input bank. Then, when it is loaded on the discharge bank loading portion is installed so that the light signal of the light emitting side is not transmitted to the light receiving portion side.

The repetitive sensor S ₄ is for preventing a malfunction when a large number of bills are counted or when the above-mentioned error occurs, that is, when the banknotes stored in the discharge bank loading unit are taken out, the repetitive sensor S ₄ . The light signal on the light emitting part side is transmitted to the light receiving part side, and the light receiving transistor which is the light receiving part is turned on so that the high level signal outputted from the NAND gate ND ₄ resets the counter 11 through the reset part 22. Through the operation control unit 2 rules, the brake drive unit 3, the clutch drive unit 4, and the motor drive unit 5 are driven. Therefore, the counting operation as described above is performed again.

)에서 출력되는 프리셋종료신호에 의해 카운트동작이 중지되어지게 된다.In other words, for example, if 500 bills are put in the input bank and the counting unit is to be counted in units of 100 sheets, the counter is set in the counter 11 through the count number setting unit 12, and then the power is turned on. If the count operation is performed as described above and counts 100 sheets, the output terminal of the count 11 (

Count operation is stopped by preset end signal output from

At this time, if 100 banknotes ejected from the payout banking unit are taken out, the counter 11 is reset by the repetitive drive signal output from the automatic repeating drive unit 28, and the motor M, etc. are driven again and again 100 sheets Count operation is performed up to. In this way, the automatic repeat counting operation is performed.

[Effects of the Invention]

As described above, according to the present invention, the bills can be counted automatically, and after counting by the set number, the bills remaining in the loaded bill stacking unit can be counted automatically again as soon as the counted bills are removed from the stack. By adjusting the reference voltage according to the geology of the bills, not only the bills can be counted, but also the counting operation stops when the error due to the overlapping bills, continuous bills, counter-note bills and jams occurs. By displaying the type, the reliability of the counter can be improved.

Claims (3)

A comparator (OP ₅ ) for comparing the bill detection signal by detecting the presence or absence of bills loaded in the input bank stack by the reflected light sensor (S ₃ ) and a noar gate (NOR ₁ ) having one end connected to the output terminal of the comparator (OP ₅ ). ) And an autonomous gate (NOR ₂ ) having one end connected to the output terminal of the noah gate (NOR ₁ ) and outputting the bill detection signal, and a mechanism connected to the output terminal of the noah gate (NOR ₂ ). The brake drive unit 3, the clutch drive unit 4, and the motor drive unit which control the motor M, the clutch CL, and the brake BK with a certain time difference according to the bill detection signal through the operation control unit 2. (5), the first and second paper money passing detectors 6 and 7 for detecting the passage state of the paper money by the sensors S ₁ and S ₂ , and the first and second paper money passing parts 6. 7, the output amplifier section of the amplifier section (8) (OP ₃₎ of (OP ₄₎ and the amplifier (OP ₃₎ waveform comparing unit (9) connected to the output terminal of the (OP ₄₎ and A counter 11, which is connected to count the number of bills passing through the first and second bill passing detectors 6 and 7 via the shaping section 10 in sequence, and a predetermined value of count are set in the counter 11 To stop the motor M at the end of counting between the display apparatus 27 and the counter 11 and the mechanism operation control unit 2, which are connected to display the count number setting unit 12 and the count value and the malfunction state. Comparators OP ₁ and OP ₂ are connected to output terminals of the set value reaching detector 13 and the first and second banknote passing detectors 6 and 7, respectively, to compare the output signal with the reference signal and stack the money. Double detection unit 14 for detecting the detection, jam detection unit l5 connected to the output terminal of the noah gate NOR ₅ of the waveform comparison unit 9 to detect the jam state of the bill according to the output phase to detect the counter-volume bill each NAND gate (ND ₆₎ comparison of the waveform section 9 Connected first and second NOR gate (NOR ₁₆₎ of the stub detector 16 17 and the continuous paper money connected to detect the continuous paper money detector 18, the output phase shifter continuous banknote detecting unit 18 of the NAND gate (ND ₂₄₎ A reference oscillator 19 connected to one input terminal of the reference, the overlap detection unit 14 and the jam detection unit 15, the first and second semi-circle detection unit 16 and 17, and the continuous paper money detector 18 to detect its malfunction Accordingly, the output terminal of the no-gate NOR ₁₄ is connected to the flip-flop unit 20, the error classifying unit 21, and the counter 11 connected to display the state of the display device 27 and generate an alarm sound. A reset unit 22 which resets the counter 11, a restart driver 23 connected to the reset unit 22 to re-drive the counter 11 and the motor M when the malfunction factor is removed; It is connected to each output terminal of the 2nd half-wound detection part 17, the mechanism motion control part 2, and the reset part 22, and detects the idling of the motor M, The idle detection unit 25 connected to send the detection signal to the mechanism operation control unit 2 and the buzzer unit 24, and at each output terminal of the reset unit 22, the idle detection unit 25 and the counter 11, respectively. The bill counter, characterized in that it is provided with a buzzer 24 and a display flasher 26 to flash the indicator of the display device 27 connected to raise the buzzer. The voltage divider according to claim 1, characterized in that the resistances Rf ₁ (R _f 2) (VR) of the permeation control unit 29 are respectively provided at one input terminal of the comparator OP ₁ (OP ₂ ) of the overlap detection unit 14. Billed counter, characterized in that to adjust the reference voltage of the comparator (OP ₁ ) (OP ₂ ) in the lap detection unit 14 according to the type of bill. The output of the NAND gate ND ₄ of the automatic repeat drive unit 28 according to claim 1, wherein the repetitive sensor S ₄ is provided at one input terminal of the NOA gate NOR ₂₁ of the mechanism operation control unit 2. When the banknote in the banknote loading section is connected and the banknote in the input banknote loading section can be counted again by the set number.

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