JPS6129106Y2 - - Google Patents

Description

[Detailed explanation of the idea]

[Industrial Application Field] The present invention relates to a coin acceptance control device that controls acceptance or return of inserted coins based on the output of a coin sorter. [Prior Art] Changer devices such as vending machines must accept inserted coins correctly and prevent malfunctions. To this end, it goes without saying that the accuracy of the coin sorter must be improved, but it is also necessary to ensure that there is no malfunction based on the output of the coin sorter in controlling the acceptance or return of input coins at the coin branching point. [Means and effects for solving the problems] The present invention has been made in view of the above-mentioned points, and provides a coin acceptance control device that reliably controls the insertion of coins, especially when coins are continuously inserted. This is what we aim to provide. In this invention, in the standby state, it is always ready to accept coins,
If the inserted coin is determined to be a genuine coin, the coin is accepted as is, and if the inserted coin is determined to be a counterfeit coin, the system switches to a return mode for a certain period of time. If a coin is inserted while the coin is in the return mode, the return mode time is updated to maintain the return mode regardless of whether the coin is genuine or false.
Therefore, if coins are successively inserted into counterfeit coins at extremely short time intervals, all coins following the counterfeit coins will be returned regardless of whether they are genuine or false. As a result, if genuine coins and counterfeit coins are mixed and continuously inserted at extremely short intervals, if genuine coins and counterfeit coins were to be sorted and accepted and returned separately, there would be a timing lag and the counterfeit coins would be rejected. While there is a risk of malfunctions such as accepting genuine coins and returning genuine coins, the present invention prevents such malfunctions from occurring at all. On the other hand, in the present invention, if only specie coins are continuously inserted, all of them are accepted, resulting in extremely high efficiency. [Embodiment] Hereinafter, an embodiment of the present invention will be described in detail based on the attached drawings. In FIG. 1, a coin inserted from the coin slot 10 passes through coil-type coin sorters 11 and 12, and if the coin is determined to be a genuine coin, the pin 13 remains retracted at the branch point. The coin is guided to the coin sorting mechanism 14, but if it is determined to be a counterfeit coin, the pin 13 protrudes and the coin is guided to the return path 15. The coin sorting mechanism 14 mechanically sorts coins into denominations based on differences in outer diameter, and guides the coins to coin storage devices (not shown) for each denomination. After the coin sorting mechanism 14, there are coin sensors 16A and 16 for each denomination.
B and 16C are provided, and when coins sorted according to outer diameter pass, a coin detection pulse is generated from the corresponding coin sensor (any one of 16A to 16C). Coin sensor 16A for each denomination
A coin detection pulse generated from 16C is counted by a counter (not shown) that counts the number of coins (or amount) inserted. The outputs of the coin sorters 11 and 12 are used for counting by the counter, and are used exclusively for controlling the expansion and contraction of the pin 13. The coin sorter 11, which consists of an oscillating coil 11a and a receiving coil 11b (see FIG. 2), which are sized to cover the entire outer diameter of the coin, is mainly involved in determining the material of the coin. A short transmitting coil 12a and a receiving coil 12b (second
The coin sorter 12 consisting of a coin sorter (see figure) is mainly involved in determining the coin diameter. An embodiment of a circuit for generating the signal SOL for controlling the expansion and contraction of the pin 13 based on the outputs of the coin sorters 11 and 12 is shown in FIG. In FIG. 2, an oscillation circuit 17 oscillates a signal at a frequency suitable for material discrimination (for example, about 10 KHz), and this oscillation output is applied to one oscillation coil 11a. The oscillation circuit 18 oscillates a signal at a high frequency (for example, about 100 KHz) suitable for determining the outer diameter,
This oscillation output is applied to the other oscillation coil 12a. The output of one receiving coil 11b is input to amplifiers 21 and 22 and a comparator 25 via a detection amplifier circuit 19. The other receiving coil 12b
The output is inputted to amplifiers 23 and 24 and a comparator 26 via a detection amplifier circuit 20, and further level-shifted by a voltage dividing circuit 28 and then inputted to a comparator 27. The outputs of the detection amplifier circuits 19 and 20, that is, the reception outputs, show a constant high-level waveform in the standby state, that is, when no coin is passing through, but when a coin passes, they exhibit a valley-shaped waveform in response to the material or external diameter of the coin. The attenuation waveform is shown. A circuit consisting of the amplifier 21, a diode 29 and a capacitor 33 connected in the opposite direction to its output constitutes a circuit that stores the lowest level, that is, the peak value (trough value) of the attenuation waveform. That is, when a voltage lower than the voltage across the terminals of the capacitor 33 appears at the output of the amplifier 21, the diode 2
9 is conductive, and the voltage of the capacitor 33 is always maintained at the lowest voltage. The amplifier 23, diode 31, and capacitor 35 similarly constitute a lowest level (peak value) storage circuit. A circuit including the amplifier 22, a diode 30 connected to its output in the forward direction, a capacitor 34, and a discharging resistor 37 constitutes a circuit that stores a steady voltage value in a standby state. That is, when a voltage higher than the voltage across the terminals of the capacitor 34 appears at the output of the amplifier 22, the diode 30 becomes conductive and the capacitor 34 is charged. is discharged through the resistor 37 until it matches the output voltage of . This discharge hardly responds to the drop in reception level that occurs instantaneously when a coin passes, and therefore, the steady voltage value in the standby state is always stored in the capacitor 34. Similarly, the circuit consisting of the amplifier 24, diode 32, capacitor 36, and resistor 38 constitutes a steady level storage circuit in the standby state. Note that each time a coin passes, a reset signal RESET is generated as described above, and this signal RESET causes the capacitor 33 to
and 35 memories are cleared. Appropriate reference voltage is applied to comparators 25 and 26.
V ₁ and V ₂ are set, and the detection amplifier circuit 19,
When the output of the comparators 20 becomes lower than the voltages V ₁ and V ₂ , the comparators 25 and 26 output "1". The outputs of the comparators 25 and 26 are outputted as a coin passage detection signal ¥ via an OR circuit 39. This coin passage detection signal Y is generated when a coin passes, regardless of whether it is a genuine coin or a counterfeit coin, and an example thereof is shown in FIG. The (-) input of the comparator 27 is connected to the peak value (trough value) voltage V stored in the capacitor 35.
_PB is applied. Attenuation waveform V _B in response to the coin output from the detection amplifier circuit 20 and the voltage dividing circuit 28
FIG. 3 shows an example of the waveform V _B that has been level-shifted. The comparator 27 outputs a peak signal PEAK when the level-shifted waveform V _B is higher than the peak value voltage V _PB . As shown in Figure 3,
The peak signal PEAK rises slightly later than when the attenuation waveform V _B reaches its peak value (trough value), and falls in synchronization with the fall of the coin passage detection signal Y. This is because the coin acceptance control circuit 50 generates a reset signal RESET in synchronization with the fall of the signal Y.
This is because the memory of the peak value _VPB of the capacitor 35 is cleared. Voltage V stored in capacitors 33 to 36
_PA , V _RA , V _RB , V _RB are two window circuits 40, 41
is input. The window circuit 40 is a circuit that determines whether a coin is genuine or false based on the material, and has a peak value voltage V
_PA is applied to the (-) input of comparator 42 and the (+) input of comparator 43, and the standby voltage V _RA is applied to the resistance
It is added to the voltage divider circuit consisting of R ₁ , R ₂ , and R ₃ . The window circuit 41 is a circuit that determines whether a coin is genuine or false based on the outer diameter, and the peak value voltage _VPB is applied to the (-) input of the comparator 45 and the (+) input of the comparator 46, and the standby state voltage V _RB is resistor R4, R5. It is added to the voltage divider circuit consisting of R6. Resistance R1, R2, R
3, the standby state voltage V _RA is divided into comparator 4.
2.43 reference voltages V _RA1 and V _RA2 are generated. V
_RA1 > V _RA2 , and V _RA1 is the (+) of the comparator 42.
At the input, V _RA2 is applied to the (-) input of comparator 43, respectively. Comparator 42 produces an output "1" when V _PA <V _RA1 , and comparator 43 produces an output when V _PA >V _RA2 . The outputs of the comparators 42 and 43 are applied to an AND circuit 44. When the peak value voltage V _PA is between the two reference voltages V _RA1 and V _RA2 , that is, when V _RA1 > V _PA > V _RA2 , the AND circuit 44
“1” is output from. This means that the coin has been determined to be genuine coin in terms of material. Resistance R
4, R5, and R6, the reference voltages V _RB1 and V _RB2 are V _RB1 > V _RB2 , and similarly to the above, V _RB1 > V _PB > _RB2 , and similarly to the above. , when V _RB1 > V _PB > V _RB2 , “1” is output from the AND circuit 47. This means that it is determined to be a genuine coin in terms of the outer diameter. The outputs of AND circuits 44 and 47 are applied to AND circuit 48.
Therefore, "1" is output from the AND circuit 48 only when both the material and the outer diameter are genuine coins. By the way, the window circuits 40, 41 and the AND circuit 4
No. 8 determines authenticity with respect to only one denomination. Therefore, a circuit similar to the window circuits 40, 41 and the AND circuit 48 is provided for each denomination, and genuine coin detection signals K _A , K _B , K _C for each denomination are input to the OR circuit 49. . The output of the OR circuit 49 is sent to the coin acceptance control circuit 5 as a signal K indicating that the inserted coin is a genuine coin.
Added to 0. Note that the voltage division ratio of the voltage divider circuit for dividing the standby state voltages V _RA and V _RB to obtain the reference voltages V _RA1 , V _RA2 , V _RB1 , and V _RB2 is set to an optimal value that differs for each denomination. Of course. An example of the generation of the genuine currency signal K is shown in FIG. In the case of counterfeit currency, the genuine currency signal K remains at "0" as shown by the broken line. In the coin acceptance control circuit 50, the genuine coin signal is K.
is inverted by an inverter 51 and applied to an AND circuit 52. Other inputs of the AND circuit 52 include the coin passage detection signal Y from the OR circuit 39 and the comparator 2.
The peak signal PEAK from 7 is added. Therefore, the output of the AND circuit 52 (counterfeit coin detection signal S) temporarily becomes "1" when the inserted coin is a counterfeit coin, and otherwise becomes "0". The output of the AND circuit 52 is applied to a NOR circuit 53, and the output of this NOR circuit 53 is applied to a timer 54. The timer 54 delays the rise of the timer output T2 to "1" by the time set by the resistor R7 and the capacitor _C1 when the output of the NOR circuit 35 rises from "0" to "1". That is, the output of the NOR circuit 53 is applied to the AND circuit 60, delayed by the amplifier 61, resistor R7, and capacitor C1, and applied to other inputs of the AND circuit 60, and from this AND circuit 60 is the timer output.
T ₂ is obtained. The output _T2 of timer 54 is output from amplifier 5.
5 as the solenoid control signal SOL. When the solenoid control signal SOL is "1", a solenoid (not shown) for driving the pin 13 is energized, the pin 13 is retracted, and the inserted coin is accepted into the coin transfer mechanism 14 as a genuine coin. signal
When SOL is "0", the solenoid is deenergized, the pin 13 protrudes, and the inserted coin is returned to the return path 15 as a counterfeit coin. The output T ₂ of the timer 54 is inverted by an inverter 56 , and the inverted output T ₂ is input to an AND circuit 57 . The coin passage detection signal Y is input to the other input of the AND circuit 57. This signal T ₂ is the signal
It is "1" when SOL is "0", that is, when the coin is returned. The output of the AND circuit 57 is input to the NOR circuit 53. The coin passage detection signal Y is inverted by an inverter 58 and applied to an OR circuit 59. The other input of the OR circuit 59 receives the inverted signal T ₂ of the timer output T ₂ . The output of the OR circuit 59 is a reset signal
Used as RESET to clear capacitors 33 and 35. Therefore, the reset signal RESET is generated at any time other than when a coin is passing through the coin sorters 11, 12 or when the pin 13 is protruding and ready to return the coin. Further, the coin passage detection signal Y is input to the timer 62. The timer 62 includes an AND circuit 63 that receives the signal Y, and an amplifier 6 that delays the rise of the signal Y.
4, a resistor R8, and a capacitor C2, and the voltage of the capacitor C2 is applied to the other input of the AND circuit 63. Resistor R8 and capacitor C2
The time constant is set longer than the time width that the coin passage detection signal Y can normally take, and when the time width of the signal Y is longer than usual, the output of the AND circuit 63
_T1 rises to “1”. When the time width of the signal Y is normal, the output _T1 remains at "0". this signal
T ₁ is input to the NOR circuit 53. The NOR circuit 53 outputs "1" when all three inputs (T ₁ , S, and the output of the AND circuit 57) are "0", and outputs "0" when any of the three inputs becomes "1". The timer 54 outputs the output T 2 for a certain period of time (time determined by the next constant of R7 and C1) when the output of the NOR circuit 53 is "0" and when it rises from "0" to "1" _. becomes "0", and only during that time, the signal SOL becomes "0", the pin 13 protrudes, and the coin is returned. The state of the pin 13 can be broadly classified into the following four types.

[Effect of idea]

As explained above, according to the present invention, when coins are continuously inserted, they are returned only if they contain counterfeit coins, and otherwise they are always accepted, so what happens to genuine coins? Even if they are input continuously at short intervals, all of them are accepted, resulting in extremely high efficiency and reliable prevention of malfunctions.

[Brief explanation of drawings]

FIG. 1 is a sectional view schematically showing an example of a coin device mechanism to which the coin sorting device of the present invention is applied, FIG. 2 is an electrical rotation diagram showing an embodiment of the present invention, and FIG.
It is a graph which shows an example of the output waveform of each part of a figure. 10... Coin slot, 11, 12... Coin sorter, 11a, 12a... Oscillation coil, 11b, 1
2b... Receiving coil, 13... Pin, 14... Coin sorting mechanism, 15... Return path, 16A to 16C
...coin sensor, 19,20...detection amplifier circuit,
40, 41...Window circuit, 42, 43, 45, 46
... Comparator, 50 ... Coin acceptance control circuit, 54,
62...Timer.

Claims (1)

[Scope of Utility Model Registration Request] Coin sorting means for detecting authenticity of input coins, driven by a solenoid, energizing the solenoid to guide the input coins to the receiving side, and deactivating the solenoid to guide the input coins to the return side. a timer that operates based on the counterfeit currency detection signal from the sorting means; and a solenoid control that de-energizes the timer when the timer is operating and energizes the solenoid when the timer is not operating. A coin acceptance control device comprising: means for updating the operation of the timer when a coin is inserted while the timer is operating.