KR900001028A - High voltage semiconductor device and manufacturing method thereof - Google Patents

High voltage semiconductor device and manufacturing method thereof Download PDF

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Publication number
KR900001028A
KR900001028A KR1019880007207A KR880007207A KR900001028A KR 900001028 A KR900001028 A KR 900001028A KR 1019880007207 A KR1019880007207 A KR 1019880007207A KR 880007207 A KR880007207 A KR 880007207A KR 900001028 A KR900001028 A KR 900001028A
Authority
KR
South Korea
Prior art keywords
semiconductor device
high voltage
main junction
voltage semiconductor
etching
Prior art date
Application number
KR1019880007207A
Other languages
Korean (ko)
Other versions
KR910004316B1 (en
Inventor
김종오
김진형
Original Assignee
정몽헌
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 정몽헌, 현대전자산업 주식회사 filed Critical 정몽헌
Priority to KR1019880007207A priority Critical patent/KR910004316B1/en
Priority to US07/364,624 priority patent/US5003372A/en
Priority to JP14857689A priority patent/JPH0715988B2/en
Publication of KR900001028A publication Critical patent/KR900001028A/en
Application granted granted Critical
Publication of KR910004316B1 publication Critical patent/KR910004316B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Weting (AREA)
  • Thyristors (AREA)

Abstract

내용 없음.No content.

Description

고전압용 반도체 소자 및 제조방법High voltage semiconductor device and manufacturing method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제 1a 도는 종래의 고전압용 소자의 단면도.1A is a cross-sectional view of a conventional high voltage device.

제 1b 도는 종래의 고전압용 반도체 소자의 평탄면 필드 플레이트 길이와 블로킹 전압간의 그래프도.1B is a graph showing the flat field plate length and blocking voltage of a conventional high voltage semiconductor device.

Claims (2)

N+기판 위에 N-에피텍셜층을 형성하여 P+확산영역을 형성시킨 주접합의 외곽을 절연성 유리로 두껍게 형성시키고, 캐소드와 동일 전극을 일정길이만큼 형성시킨 고전압용 반도체 소자에 있어서, 상기 주접합의 외곽일부를 P+확산영역과 같은 깊이로 에칭시킨 홈의 내부 및 외부에 절연성이 양호한 유리(2)로 절연막을 형성한후, 그 위에 캐소드와 동일한 전도 물질의 전극을 형성시켜, 홈의 주변길이만큼 평탄한 필드 플레이트의 길이를 줄인 구조로 이루어진 것을 특징으로 하는 고전압용 반도체 소자.In the high voltage semiconductor device in which the main junction where the N- epitaxial layer is formed on the N + substrate and the P + diffusion region is formed thick with insulating glass, and the cathode and the same electrode are formed by a predetermined length, the outer part of the main junction Is formed of an insulating glass on the inside and outside of the groove etched to the same depth as the P + diffusion region, and then formed an electrode of the same conductive material as the cathode thereon, so that the field is as flat as the peripheral length of the groove. High voltage semiconductor device, characterized in that the structure consisting of a reduced plate length. 필드 플레이트 구조의 고전압용 반도체 소자 제조방법에 있어서, 주접합의 외곽 일부에 에칭홈을 형성하는 공정과, 상기 에칭홈의 내,외부상에 절연막을 일정 두께로 형성한후, 주접합부의 P+확산영역 표면의 소정길이만큼을 에칭시키는 공정과, 상기 유리 도핑공정후에, 상기 주접합부의 에칭처리 부분과 그 외곽에 형성된 에칭홈상에 캐소드와 동일한 전도물질의 전극을 일정길이만큼 형성시키는 공정으로 이루어진 것을 특징으로 하는 반도체 소자 제조방법.In the method of manufacturing a high voltage semiconductor device having a field plate structure, a step of forming an etching groove in a part of the outer peripheral portion of the main junction, and forming an insulating film on the inner and outer sides of the etching groove to a predetermined thickness, and then the P + diffusion region of the main junction portion Etching a predetermined length of the surface, and forming, after the glass doping process, an electrode of the same conductive material as that of the cathode by a predetermined length on the etching portion formed in the main junction portion and the etching groove formed on the outer portion thereof. A semiconductor device manufacturing method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019880007207A 1988-06-16 1988-06-16 Semiconductor device and its manufacturing method for high voltage KR910004316B1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1019880007207A KR910004316B1 (en) 1988-06-16 1988-06-16 Semiconductor device and its manufacturing method for high voltage
US07/364,624 US5003372A (en) 1988-06-16 1989-06-09 High breakdown voltage semiconductor device
JP14857689A JPH0715988B2 (en) 1988-06-16 1989-06-13 High voltage semiconductor device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019880007207A KR910004316B1 (en) 1988-06-16 1988-06-16 Semiconductor device and its manufacturing method for high voltage

Publications (2)

Publication Number Publication Date
KR900001028A true KR900001028A (en) 1990-01-31
KR910004316B1 KR910004316B1 (en) 1991-06-25

Family

ID=19275223

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019880007207A KR910004316B1 (en) 1988-06-16 1988-06-16 Semiconductor device and its manufacturing method for high voltage

Country Status (1)

Country Link
KR (1) KR910004316B1 (en)

Also Published As

Publication number Publication date
KR910004316B1 (en) 1991-06-25

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